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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
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      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • Allegro X Design Platform
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  • Tensilica Xtensa Audio Framework



Tensilica Xtensa Audio Framework

Online Courses
Version Region
9.3 Online ENROLL
Other Versions Online EXPRESS INTERESTINQUIRE

Length: 1/2 day (4 Hours)

Course Description

This course helps you understand the Xtensa Audio Framework (XAF) purpose and features. It gives an overview of the XAF software stack, applications, building blocks, and use cases. You will learn how to work with the XAF processing chain, create and integrate new components.

Learning Objectives

After completing this course, you will be able to:

  • Understand the Xtensa Audio Framework (XAF) purpose and important features
  • Get an overview of the XAF software stack
  • Get familiar with XAF examples, write and debug programs
  • Understand constructing audio processing chains using examples from the XAF release package.
  • Profile the code performance and understand the memory requirements

Software Used in This Course

  • Tensilica Xtensa Xplorer IDE v.8.0.12
  • Tensilica Xtensa Software Tools v14.03

Software Release(s)

RI-2019.3

Modules in this Course

  • XAF Overview
    • XAF Features
    • XAF Software Stack 
    • XAF Use-cases / Applications
    • Getting XAF Release Package and Contents
  • Building Blocks
    • Components – Types, Properties
    • Memory Buffers – Types, Usage
    • Communication Mechanisms
    • APIs – Types, Typical Flow
    • Features Required from RTOS
  • XAF Example Use-cases in the Package
    • A Quick Tour of Examples in the Package
  • Working with XAF Processing Chain
    • Creating a Processing Chain
    • How Does App Talk to Processing Chain? 
    • How Does Components Within Processing Chain Communicate? 
    • Data Flow In XAF (Input, Output, and Connection Buffers)
  • Integrating New Components
    • Component Classes
    • Integrating a New Component Plugin
  • Advanced Topics
    • Threads in XAF
    • Memory Usage
    • RTOS Usage
    • Probe, Debug Features 
    • Key Considerations While Using XAF
  • Labs
    • Lab 1 – Build, Simulate First Example 
    • Lab 2 – Building Blocks in ‘Pcm Gain’ Example
    • Lab 3 – Two PCM Gain + Mixer
    • Lab 4 – Trace Logs

Audience

Software developers who write audio firmware/applications for HiFi and Fusion F1 DSPs, developaudio/DSP library components, and integrate the library components or Tensilica Audio/Voice codec libraries into theirapplication or firmware.

Prerequisites

You must have experience with or knowledge of the following:

  • DSP processors
  • Programming knowledge in C/C++ for embedded processors/DSPs

You must have completed the following courses:

  • Tensilica Xtensa LX Processor Fundamentals

Related Courses

  • Tensilica HiFi 3 Audio Engine ISA 
  • Tensilica HiFi 4 DSP
  • Tensilica HiFi 2/EP/Mini Audio Engine ISA
  • Tensilica Audio Codec API

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

Course ID: 86276

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