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        • Innovus Implementation and Floorplanning
        • Functional ECO
        • Low-Power Validation
        • Synthesis
        • Power Analysis
        • Constraints and CDC Signoff
        • Silicon Signoff and Verification
        • Library Characterization
        • Test
        • Flows
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        • Circuit Design
        • Circuit Simulation
        • Layout Design
        • Layout Verification
        • Library Characterization
        • RF / Microwave Solutions
        • Flows
      • System Design and Verification
        • Debug Analysis
        • Emulation
        • Formal and Static Verification
        • FPGA-Based Prototyping
        • Planning and Management
        • Simulation
        • Software-Driven Verification
        • Verification IP
        • System-Level Verification IP
        • Flows
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        • Interface IP
        • Denali Memory IP
        • Tensilica Processor IP
        • Analog IP
        • System / Peripherals IP
        • Verification IP
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        • IC Package Design
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
        • Flows
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        • RF / Microwave Design
        • Thermal Solutions
        • System Analysis Resources Hub
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        • Library and Design Data Management
        • Analog/Mixed-Signal Simulation
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
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  • Tensilica ConnX B10 DSP



Tensilica ConnX B10 DSP

Online Courses
Version Region
9.2 Online ENROLL
Other Verions Online EXPRESS INTERESTINQUIRE

Length : 2 days

Course Description

This class provides detailed information about programming the Tensilica® ConnX B10 DSP. The class provides an overview of the architecture and instruction set of the DSP, along with detailed information on how to write and optimize code. ConnX B10 instructions for common DSP operations are presented in detail.

The class also covers tips and techniques for programming VLIW/SIMD machines like the ConnX B10 and how to use the advanced capabilities of the Xtensa® C/C++ compiler to generate better compiled code.

Demonstrations and labs give practical and hands-on experience with the DSP core, libraries, and software tools. This class provides the software developer or firmware engineer the essential skills necessary to develop and optimize baseband algorithms and kernels on the ConnX B10 DSP.p>

Learning Objectives

After completing this course, you will be able to:

  • Understand the ConnX B10 architecture, instruction set, and programming model
  • Write and optimize C/C++ programs for VLIW/SIMD machines like the ConnX B10
  • Use the advanced capabilities of the Xtensa C/C++ compiler to generate efficient compiled code
  • Use the library routines provided with the ConnX B10 to accelerate your software development cycle

Software Used in This Course

  • Tensilica Xtensa Xplorer v RI-2019.1
  • Tensilica Xtensa Software Tools v RI-2019.1

Modules in this Course

  • About This Course
  • B10 Processor Overview
    • Application Performance
    • Architecture Overview
    • Instruction Set Highlights
    • Data Handling
  • Programming Styles
    • The N-Programming Model
    • Auto-Vectorization of Scalar C Code
    • C Operators with Vector Types
    • Intrinsics Use
    • DSP Libraries
    • Lab 3-1 – Vector Programming
  • Programming Guidelines
    • Lab 4-1 – Auto-Vectorization
  • B10 Instruction Overview
    • Vector Element Operations
    • Load and Store Operations
    • Multiply Operations
    • Lab 5-1 – Intrinsic Optimization
  • Advanced Topics
    • Vector Floating-Point
    • Matrix Multiply
    • Divide, Reciprocal, SQRT, RSQRT
    • LFSR-Convolutional Encoding
    • Nonlinear Function Approximation
    • FIR Support
    • FFT Support
    • Dual Peak Search
    • Error Correction
      Lab 6-1 – Packed Matrix Multiplication
  • Deliverables
    • Q/A

Audience

  • Software developers and firmware engineers writing and optimizing code for the ConnX B10 DSP

Prerequisites

You must have experience with or knowledge of the following:

  • Programming in C for embedded processors or DSPs

You must have completed the following courses:

  • Tensilica Processor Fundamentals

Related Courses

  • Tensilica ConnX BBE16EP Baseband Engine
  • Tensilica ConnX BBE32EP Baseband Engine
  • Tensilica ConnX BBE64EP Baseband Engine
  • Tensilica ConnX B20 DSP

Click here to view course learning maps, and here for complete course catalogs.

Course ID: 86258

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