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- Voltus Power Grid Analysis and Signoff with Stylus Common UI
Voltus Power Grid Analysis and Signoff with Stylus Common UI
Date | Version | Country | Location | |
---|---|---|---|---|
07 - 08 Nov 2022 | 21.1 | Germany | Feldkirchen-Munich Germany |
ENROLL |
Scheduled upon demandOn demand | EXPRESS INTERESTINQUIRE |
Version | Region | |
---|---|---|
21.1 | Online | ENROLL |
20.1 | Online | ENROLL |
Other Versions | Online | EXPRESS INTERESTINQUIRE |
Length: 2 days (16 Hours)
Digital Badge Available
Course Description
This is an Engineer Explorer course for designers who need a comprehensive and detailed understanding of power-rail analysis for advanced processes.
In this two-day course, you explore the need for power-rail analysis and use the Cadence® Voltus™ IC Power Integrity Solution with Stylus CUI software to run static and dynamic power and rail analysis. On the first day, you import design data and run some design sanity checks. You also run early rail analysis using the Innovus™ Stylus Implementation System. You then create the technology library and power-grid view libraries. On the second day, you run static power and rail analysis. You also run dynamic power and rail analysis and analyze the results. You identify different IR-aware ECO optimization techniques and develop chip package co-design model.
This course is based on the Stylus Common UI. Please consult with your Cadence AE before deciding to take this course, which is based on the Stylus UI, or the course titled Voltus Power Grid Analysis and Signoff, which is based on the Legacy UI.
Learning Objectives
After completing this course, you will be able to:
- Identify the features and capabilities of the Voltus™ IC Power Integrity Solution
- List the data import methods and run design data “sanity” checks
- Execute Early Rail Analysis to detect problems in the power grid in the early stages of the design
- Generate power-grid libraries for power-grid analysis
- Set up and run Static and Dynamic Power and Rail Analysis
- Analyze and plot power and rail results
- Identify IR Aware ECO techniques to mitigate IR drop issues
- Develop a chip package co-design model
Software Used in This Course
- Voltus IC Power Integrity Solution with Stylus CUI
- Innovus Implementation System with Stylus CUI
Software Release(s)
SSV211, INNOVUS211
Modules in this Course
- Introduction to Voltus IC Power Integrity Solution in Stylus CUI Mode
- Design Data Importing and Sanity Checks
- Early Rail Analysis
- Power-Grid View Library Generation
- Static Power and Rail Analysis
- Dynamic Power and Rail Analysis
Audience
- Analog/Mixed-Signal IC Designers
- Custom Circuit Designers
- Design Engineers
- Digital IC Designers
- IC Designers
- Place and Route Designers
- Verification Engineers
Prerequisites
You must have experience with:
- Digital place-and-route tools
- UNIX or Linux OS
Related Courses
Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.
Free Online Training Bytes (Videos)
"Very good training course, the presenter had in depth knowledge of the tool so he was able to answer all technical questions in detail."
Efthimios Hatzidis, Dialog Semiconductor

"Very good lecturer. The timing on 2 days is perfect."
Frederic Dulucq, IN2P3 OMEGA

“Completely satisfied. I got what I need.”
Fulvio Pugliese, Global Foundries

“Good course. You learn how to use Voltus Tool in daily work. All aspects are covered.”
Raffaele Ventola, Dialog Semiconductor

"It was an interesting course. I received information also about other tools which can exchange data with Voltus."
Stefano Serafini, austriamicrosystems

“I liked the background information and the insight necessary to solve problems.”
Michal Navratil, ONSemiconductor

"Very good."
Osama Senam Mostafa Ali, Fraunhofer