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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • System Design and Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation
          • Formal and Static Verification
          • FPGA-Based Prototyping
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
          • Protium X1 Enterprise Prototyping Platform
          • System VIP
          • RESOURCES
          • Flows
      • IP
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          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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        • PRODUCT CATEGORIES
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
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          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
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          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
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      • AI IP Portfolio
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  • Voltus Power Grid Analysis and Signoff with Stylus Common UI



Voltus Power Grid Analysis and Signoff with Stylus Common UI

Online Courses
Instructor-Led Schedule
Date Version Country Location
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Length : 2 days

Digital Badge Available

Course Description

This is an Engineer Explorer course for designers who need a comprehensive and detailed understanding of power-rail analysis for advanced processes.

In this two-day course, you explore the need for power-rail analysis and use the Cadence® Voltus™ IC Power Integrity Solution with Stylus CUI software to run static and dynamic power and rail analysis. On the first day, you import design data and run some design sanity checks. You also run early rail analysis using the Innovus™ Stylus Implementation System. You then create the technology library and power-grid view libraries. On the second day, you run static power and rail analysis. You also run dynamic power and rail analysis and explore more advanced power-rail analysis and decap optimization.

This course is based on the Stylus Common UI. Please consult with your Cadence AE before deciding to take this course, which is based on the Stylus UI, or the course titled Voltus Power Grid Analysis and Signoff, which is based on the Legacy UI.

Learning Objectives

After completing this course, you will be able to:

  • Run early rail analysis to detect problems in the early stage of the design
  • Discover the input data that is required for power-grid analysis and run design data sanity checks
  • Run signoff power-grid analysis and explore how it fits within the design flow
  • Generate power-grid libraries for power-grid analysis
  • Run static and dynamic power and rail analysis
  • View the results of static and dynamic power and rail analysis and debug power-grid issues

Software Used in This Course

  • Voltus IC Power Integrity Solution with Stylus CUI
  • Innovus Implementation System with Stylus CUI

Software Release(s)

SSV201, INNOVUS201

Modules in this Course

  • Introduction to Voltus IC Power Integrity Solution in Stylus CUI Mode
  • Design Data Importing and Sanity Checks
  • Early Rail Analysis
  • Power-Grid View Library Generation
  • Static Power and Rail Analysis
  • Dynamic Power and Rail Analysis

Audience

  • Analog/Mixed-Signal IC Designers
  • Custom Circuit Designers
  • Design Engineers
  • Digital IC Designers
  • IC Designers
  • Place and Route Designers
  • Verification Engineers

Prerequisites

You must have experience with:

  • Digital place-and-route tools
  • UNIX or Linux OS

Related Courses

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

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Course ID: 86232

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"Very good training course, the presenter had in depth knowledge of the tool so he was able to answer all technical questions in detail."

Efthimios Hatzidis, Dialog Semiconductor

"Very good lecturer. The timing on 2 days is perfect."

Frederic Dulucq, IN2P3 OMEGA

“Completely satisfied. I got what I need.”

Fulvio Pugliese, Global Foundries

“Good course. You learn how to use Voltus Tool in daily work. All aspects are covered.”

Raffaele Ventola, Dialog Semiconductor

"It was an interesting course. I received information also about other tools which can exchange data with Voltus."

Stefano Serafini, austriamicrosystems

“I liked the background information and the insight necessary to solve problems.”

Michal Navratil, ONSemiconductor

"Very good."

Osama Senam Mostafa Ali, Fraunhofer

 
 

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