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  • Innovus Clock Concurrent Optimization Technology with Stylus Common UI



Innovus Clock Concurrent Optimization Technology with Stylus Common UI Training

Instructor-Led Schedule
Online Courses
Date Version Country Location
15 Sep 2025 25.1 Israel Petah-Tikva-Tel Aviv
Israel
ENROLL
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE
Version Region
25.1 Online ENROLL
23.1 Online ENROLL
22.1 Online ENROLL
Other Versions Online EXPRESS INTERESTINQUIRE

Take the Accelerated Learning Path 

Length: 1 Day (8 hours)

Course Description

Note: This course is based on the Stylus Common UI. Please consult your design team or your Cadence AE before deciding to take this course instead of the course called Innovus™ Clock Concurrent Optimization Technology for Clock Tree Synthesis, which is based on the default UI. If there is not a clear preference, please select this course.

In this course, you learn how to use the Clock Concurrent Optimization (CCOpt™) technology, which is integrated into the Innovus Implementation System software to achieve the best clock tree for your power, performance and area (PPA) targets for your design. You learn clock tree theory and concepts as well as practical guides on how to set up properties as well as techniques to implement and debug the generated tree with the Clock Tree Debugger (CTD) tool.

Learning Objectives

After completing this course, you will be able to:

  • Implement the clock tree using CCOpt technology using the generated constraints
  • Specify clock properties to customize the clock tree, including:
  • Defining route types, CTS cells, stop and ignore pins
  • Modifying source latency settings in hierarchical implementation to meet timing at the block level
  • Analyze and debug the tree using the information in the log file
  • Analyze the QoR of the generated tree
  • Assess how CCOpt analyzes chains between register stages and
  • Recognize when CCOpt uses slack in chains to meet timing
  • Review the log file and determine how the worst chain analysis report can provide additional information about why the timing could not be met
  • Run the Clock Tree Debugger in trial and cluster modes of CCOpt to determine causes for unmet clock targets
  • Evaluate the advantages and disadvantages of various clock structures
  • Implement a flexible H-tree

Software Used in This Course

  • Digital Design Implementation System

The software includes Genus™ Synthesis Solution, Joules™, and the Innovus™ Implementation System.

Software Release(s)

DDI251 (Supported on RHEL 8.4x and above)

Modules in this Course

  • Setting Up and Running CCOpt Clock Tree Synthesis
  • Generating a CCOpt Clock Spec File and Running CCOpt
  • Overriding Defaults with Attributes
  • CCOpt Debug, Analysis and Tuning
  • Implementing H-Trees and Multi-Tap CTS

Audience

  • Physical Design Engineers
  • Chip Designers

Prerequisites

You must have experience with or knowledge of the following:

  • Innovus Implementation System software

Related Courses

  • Innovus Block Implementation with Stylus Common UI
  • Cadence RTL-to-GDSII Flow

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

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Course ID: 86230
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“Very good course, high density, good interaction.”

Steffen Hofmann, EDC Electronic Design Chemnitz

"It was great."

Jan Ludvik, ONSemiconductor

“The course gives confidence to handle designs with complicated clock structure. A structured debug approach was presented, which helps with narrowing-down the problem faster."

Simi Ethiraj, Socionext

“The presentation style was really good (...) interactive. In general, EDI/Innovus trainings are really efficient. If you visit one training, you will benefit for many years."

Oliver Schrape, IHP-Microelectronics

“(...) this course was quite useful. Everything was quite good."

Ilya Sidorov, Socionext

 
 
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