- Home
- :
- Training
- :
- All Courses
- :
- Advanced Synthesis with Genus Synthesis Solution
Advanced Synthesis with Genus Synthesis Solution
Date | Version | Country | Location | |
---|---|---|---|---|
Scheduled upon demandOn demand | EXPRESS INTERESTINQUIRE |
Version | Region | |
---|---|---|
16.2 | Online | ENROLL |
Other Versions | Online | EXPRESS INTERESTINQUIRE |
Length : 1 day
Course Description
This is an Engineer Explorer course for designers familiar with synthesis concepts.
In this course, you use Genus™ Synthesis Solution to debug problems in the synthesis of complex designs when optimizing for timing, area, and power. This course includes problem scenarios that you typically encounter in a synthesis flow and how you can debug them. You also learn to use the synthesis flow to achieve better quality of results for the place-and-route tools.
Note: This course is based on the legacy user interface and not the common user interface.
Learning Objectives
After completing this course, you will be able to:
- Identify the features of the Cadence® Genus Synthesis Solution
- Analyze the log file to debug and fix the timing of a design
- Apply retiming to fix the timing of a complex block
- Identify best practices for synthesizing complex designs
- Learn how to use Genus Physical
- Analyze Physical Synthesis results
- Identify multimode design methodology
- Verify designs using Conformal® Equivalence Checker
- Validate constraints using Conformal Constraint Designer
- Set up power intent based Low-Power Flow in Genus
Software Used in This Course
- Genus Synthesis Solution with Physical
- Innovus™ Implementation System
- Conformal Ultra
Software Release(s)
Genus 16.2, Innovus 16.2, LEC 16.2
Modules in this Course
- Overview of Genus Synthesis Solution
- Analyzing Results
- Optimizing Datapaths
- Optimization Best Practices
- Genus Physical Synthesis
- Debugging Problems in Genus Physical
- Multiple Mode Designs
- Genus-LEC Verification Flow
- Low-Power Synthesis in Genus
Audience
- ASIC Designers
- Digital IC Designers
- Logic Designers
Prerequisites
You must have experience with the following:
- Genus Synthesis Solution
Or you must have completed the following course:
Related Courses
INSTRUCTIONAL VIDEOS
Training Bytes
Log into Cadence Online Support to watch our short videos to explore an element of a language, make sense of a methodology, or learn how to do a task