Length: 3 days
Course Description
This is an Engineer Explorer series course. The Engineer Explorer courses explore advanced topics.
For Cadence Online Support (COS) users, free online training is accessible at COS: Stratus Basic Training.
This training introduces hardware designers to high-level synthesis. It reviews the C++ and SystemC languages, examines the SystemC coding style for high-level synthesis, and uses the Cadence® Stratus™ High-Level Synthesis to explore micro-architectural alternatives.
Learning Objectives
After completing this course, you will be able to:
- Take a system-level SystemC design through high-level synthesis with good quality of results
Software Used in This Course
- Stratus HLS – L
- Stratus IDE
Software Release(s)
STRATUS181
Modules in This Course
- Stratus Overview
- Stratus Methodology
- Introduction to SystemC
- Stratus Projects
- HLS Primer
- I/O Protocols
- Arrays and Memories
- Loops
- Latency
- Partitioning
- Pipelining
- Verification
- I/O Configurations
- Interface Generator
- Hierarchy in Stratus HLS
- Logic Synthesis
- Low Power
- Advanced Topics
Audience
- Digital hardware designers migrating from RT-level design to system-level design
Prerequisites
You must have experience with or knowledge of the following:
- C++ programming
- Digital hardware design
- Logic synthesis and simulation
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