Length: 1 day (8 Hours)
Course Description
Cadence® OrbitIO™ System Planner helps design teams quickly assess and plan connectivity between the die and package in context of the full system — all within a single-canvas multi-fabric environment. It’s ideal for system architects or anyone responsible for developing the die-to-package interface and coming up with the optimal combination of bump/ball configurations and net assignments. It helps semiconductor companies evaluate route feasibility of the package, as well as develop and communicate a route plan to their package design resources.
Learning Objectives
After completing this course, you will be able to:
- Define and edit bump and ball pad patterns parametrically
- Automatically allocate ratio-driven signal, power and ground pins
- Floorplan critical nets and interfaces
- Map nets across fabrics
- Create bundles and flow plans for detailed connection assignment
- Import devices and route bundles into SiP Layout for implementation
Software Used in This Course
Software Release(s)
SPB17.4-2019QIR1(S007)
Modules in this Course
- User Interface
- Creating and Importing Design Components
- Hierarchy and Net Mapping
- Personalities
- Optimization
- Debugging Problems
Audience
- Layout Designers
- Electrical Engineers
Prerequisites
You must have:
- A basic understanding of printed circuit boards and IC packages
Related Courses
Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.
