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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation and Prototyping
          • Formal and Static Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Analog IP
          • Denali Memory IP
          • Interface IP
          • System / Peripherals IP
          • Tensilica Processor IP
          • Verification IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Omnis
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
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      • AI IP Portfolio
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        • Hyperscale Computing
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        • Mixed Signal
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        • Hyperscale Computing
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  • Allegro EDM for Administrators



Allegro EDM for Administrators

Instructor-Led Schedule
Date Version Country Location
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE

Length : 2 days

Course Description

TheAllegro® EDM for Administrators course is for people who areresponsible for updating and maintaining the Allegro EDMenvironment and databases. You explore the Workbench Configuration Manager. Youcomplete an overview of the DBEditor tool and explore the library structures, aswell as the library distribution process. Finally, you complete an overview ofworkspaces, projects, and flows.

Learning Objectives

After completing this course, you will be able to:

  • Use the Workbench Configuration Manager
  • Apply the DBEditor tool
  • Use library classifications
  • Create a library classification structure
  • Understand the reference library basics and the library distribution process
  • Understand workspaces, projects, and flows
  • Create and configure workspaces
  • Create projects and configure the project setup wizard

Software Used in This Course

  • Allegro Design Authoring (PS2000)
  • Allegro Design Authoring with High Speed Option (PA1410)
  • Allegro PCB Designer (PA3100)
  • Allegro Library Server (PDW703)
  • Allegro Data Manager (PDW504)
  • Allegro Library Manager (PDW624)

Software Release(s)

SPB17.2-2016QIR7 or later

Modules in this Course

  • Software Installation
  • Configuration Manager
  • Allegro EDM Libraries
  • Library Distribution
  • Library Administration
  • Workspaces, Projects, and Flows

Audience

  • Thiscourse is for those who need to configure and install the Allegro EDM productor who are supporting the users of Allegro EDM.

Prerequisites

You must have experience with or knowledge of the following:

  • SPB Tools

Related Courses

  • Allegro EDM Design Entry HDL Front-to-Back Flow
  • Allegro EDM PCB Librarian

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

Course ID: 86093

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