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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
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          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
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          • System Analysis Resources Hub
          • AWR Free Trial
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          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
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          • Augmented Reality Lab Tools
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  • Tensilica ConnX BBE32EP Baseband Engine



Tensilica ConnX BBE32EP Baseband Engine

Online Courses
Version Region
9.6 Online ENROLL
Other Versions Online EXPRESS INTERESTINQUIRE

Length: 2 days (16 Hours)

Course Description

This class provides detailed information about programming the Tensilica® ConnX BBE32EP Baseband Engine. The class provides an overview of the architecture and instruction set of the DSP, along with detailed information on how to write and optimize code. ConnX BBE32EP instructions for common DSP operations are presented in detail.

The class also covers tips and techniques for programming VLIW/SIMD machines like the ConnX BBE32EP and how to use the advanced capabilities of the XT-CLANG C/C++ compiler to generate better compiled code.

Demonstrations and labs give practical and hands-on experience with the DSP core, libraries, and software tools. This class provides the software developer or firmware engineer the essential skills necessary to develop and optimize baseband algorithms and kernels on the ConnX BBE32EP baseband DSP.

Learning Objectives

After completing this course, you will be able to:

  • Understand the ConnX BBE32EP architecture, instruction set, and programming model
  • Write and optimize C/C++ programs for VLIW/SIMD machines like the ConnX BBE32EP
  • Use the advanced capabilities of the XT-CLANG C/C++ compiler to generate efficient compiled code
  • Use the library routines provided with the ConnX BBE32EP to accelerate your software development cycle

Software Used in This Course

  • Tensilica Xtensa Xplorer
  • Tensilica Xtensa Software Tools

Software Release(s)

RI-2021.6

Modules in this Course

  • About This Course
  • BBE32EP Processor Overview
    • Application Performance
    • Architecture Overview
    • Instruction Set Highlights
    • Data Handling
  • Programming Styles
    • The N-programming Model
    • Auto-vectorization of Scalar C Code
    • C Operators with Vector Types
    • Intrinsics Use
    • DSP Libraries
    • Lab 3-1 – Vector Programming
  • Programming Guidelines
    • Lab 4-1 – Auto-vectorization
  • BBE32EP Instruction Overview
    • Vector Element Operations
    • Load And Store Operations
    • Multiply Operations
    • Lab 5-1 – Intrinsic Optimization
  • Advanced Topics
    • Matrix Multiply
    • Divide, Reciprocal, RSQRT
    • LFSR-Convolutional Encoding
    • 1D-Despread, Linear Block Decoder
    • FIR
    • FFT
    • Soft-demap, Inverse-LLR
    • Advanced precision
    • Dual/Single Peak Search
    • Vector Floating-Point
    • Lab 6-1 – Packed Matrix Multiplication
  • Deliverables
    • Q/A

Audience

  • Software developers and firmware engineers writing and optimizing code for the ConnX BBE32EP Baseband DSP

Prerequisites

You must have experience with or knowledge of the following:

  • Programming in C for embedded processors or DSPs

You must have completed the following courses:

  • Tensilica Processor Fundamentals

Related Courses

  • Tensilica ConnX BBE16EP Baseband Engine
    Tensilica ConnX BBE64EP Baseband Engine
  • Tensilica ConnX B10 DSP
  • Tensilica ConnX B20 DSP

Click here to view course learning maps, and here for complete course catalogs.

Course ID: 86062

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