Length : 2 days
Course Description
This course covers fundamentals of Tensilica® Xtensa® LX processor architecture and configuration options, software tools, programming, optimization and debug. You will explore topics in processor architecture and the configurable options of the Xtensa® LX series processors. You will practice working with the Xplorer Integrated Development Environment (IDE), working with Tensilica software tools, and programming Xtensa processors in the labs that are part of this course. You also learn to program Xtensa processors with application-specific instructions added by using the Tensilica Instruction Extension (TIE) language. Emulation of a Tensilica processor is discussed and demonstrated. The solid fundamentals taught in this course enable you to quickly become productive in the use of Xtensa LX processors for your SoC design.
Learning Objectives
After completing this course, you will be able to:
- Use Xtensa Xplorer (IDE) for software development
- Write, optimize, and debug C/C++ code for any Xtensa processor core
- Understand Xtensa processor architecture features and their impact on performance
- Configure an Xtensa processor suitable for your application
- Customize your application’s memory map to match your target system
- Program Xtensa processors that have TIE extensions
- Debug Xtensa processor on an FPGA or other emulation platform
Software Used in This Course
- Xtensa Software Tools Release RI-2019.2
Software Release(s)
RI-2019.2
Modules in this Course
Tensilica Processor Architecture
- Xtensa LX Processor Architecture Basics
- AR Register File and the Application Binary Interface
- Xtensa-Specific Local Memory Architecture
- Xtensa-Specific System Memory Interface
- Xtensa TIE Interfaces
- Xtensa Exception and Interrupt Architecture
Programming Cores with Tensilica Instruction Extensions
- Introduction to Tensilica Instruction Extensions
- Writing C/C++ Code for Instruction Extensions
- Understanding Compiled Code
- Simulating C/C++ Code with TIE
Developing Software for Xtensa Processors
- Introducing Xtensa Xplorer
Lab: Installation and licensing; getting help and information; a first program - Working with Projects and Build Targets
Lab: Creating projects; the active set; running your program - Running and Profiling with Xplorer
Lab: Installing sample code; perspectives; build targets; profiling - Debugging your Code
Lab: Debugging your code - Command-Line Environment
Lab: Command lines; compiling, running, debugging and profiling your application - Introduction to Linker Support Packages
- LSP Advanced Topics
- Lab: memory maps; identifying sections; modifying a memory map; moving stack/heap
- Xtensa LX Exceptions and Interrupts
- Lab: Understanding interrupt and timer code; writing the main function; compiling and simulating
- XTOS and HAL
Lab: Programming the MPU memory map; generating a bootstrap map
Xtensa Debug & Trace
- Building Target Software for Real Hardware
- Configuration Options for Hardware Debug and Trace
- Single and Multiple-Core Debug Session Demonstrations
Audience
- SoC architects designing systems with Xtensa processors
- Architects/Designers configuring Xtensa processors for a specific application
- Software developers programming Xtensa processors
- Other software/hardware engineers working extensively with Xtensa processors
Prerequisites
You must have experience with or knowledge of the following:
- Basic microprocessor architecture
- Programming in C/C++
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