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    • DESIGN EXCELLENCE
    • Digital Design and Signoff
      Digital Design and Signoff Overview

      Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

      Full-Flow Digital Solution Related Products A-Z

      Product Categories
      • Logic Equivalence Checking
        • Products
        • Conformal Equivalence Checker
        • Conformal Smart LEC
      • SoC Implementation and Floorplanning
        • Products
        • Innovus Implementation System
        • First Encounter Design Exploration and Prototyping
        • Virtuoso Digital Implementation
      • Functional ECO
        • Products
        • Conformal ECO Designer
      • Low-Power Validation
        • Products
        • Conformal Low Power
      • Synthesis
        • Products
        • Stratus High-Level Synthesis
        • Genus Synthesis Solution
        • Virtuoso Digital Implementation
      • Power Analysis
        • Products
        • Joules RTL Power Solution
      • SDC and CDC Signoff
        • Products
        • Conformal Litmus
        • Conformal Constraint Designer
      • Silicon Signoff and Verification
        • Products
        • Pegasus Verification System
        • Quantus Extraction Solution
        • Tempus Timing Signoff Solution
        • Assura Physical Verification
        • Physical Verification System
        • CMP Predictor
        • MaskCompose Reticle and Wafer Synthesis
        • QuickView Signoff Data Analysis
        • LDE Electrical Analyzer
        • Process Proximity
        • Pattern Analysis
        • Litho Physical Analyzer
        • Voltus IC Power Integrity Solution
        • Voltus-Fi Custom Power Integrity Solution
      • Library Characterization
        • Products
        • Liberate Trio Characterization Suite
        • Liberate MX Memory Characterization
        • Liberate AMS Mixed-Signal Characterization
        • Liberate Variety Statistical Characterization
        • Liberate Characterization Solution
        • Liberate LV Library Validation Solution
      • Test
        • Products
        • Modus DFT Software Solution
      • Flows
        • Flows
        • 3D-IC
        • Advanced Node
        • Arm-Based Designs
        • Library Characterization Flow
        • Low Power
        • Mixed Signal
    • Custom IC
      Custom IC / Analog/ RF Design Overview

      Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

      Overview Related Products A-Z

      Product Categories
      • Circuit Design
        • Products
        • What's New in Virtuoso
        • Virtuoso Schematic Editor
        • Virtuoso ADE Product Suite
      • Circuit Simulation
        • Products
        • Spectre Simulation Platform
        • Spectre X Simulator
        • Spectre Accelerated Parallel Simulator
        • Spectre eXtensive Partitioning Simulator
        • Spectre RF Option
        • Spectre AMS Designer
      • Layout Design
        • Products
        • What's New in Virtuoso
        • Virtuoso Layout Suite
      • Layout Verification
        • Products
        • Virtuoso DFM
        • Physical Verification System
        • Virtuoso Integrated Physical Verification System
        • Quantus Extraction Solution
        • Voltus-Fi Custom Power Integrity Solution
        • Tempus Timing Signoff Solution
      • Library Characterization
        • Products
        • Liberate Trio Characterization Suite
        • Liberate MX Memory Characterization
        • Liberate AMS Mixed-Signal Characterization
        • Liberate Variety Statistical Characterization
        • Liberate Characterization Solution
        • Liberate LV Library Validation Solution
      • Flows
        • Flows
        • Advanced Node
        • Electrically Aware Design
        • Legato Reliability Solution
        • Mixed Signal
        • Photonics
        • Virtuoso RF Solution
        • Virtuoso System Design Platform
        • 5G Systems and Subsystems
    • Verification
      System Design and Verification Overview

      Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.

      Verification Suite Related Products A-Z

      Product Categories
      • Debug Analysis
        • Products
        • Indago Debug Platform
        • Indago Debug Analyzer App
        • Indago Embedded Software Debug App
        • Indago Protocol Debug App
        • SimVision Debug
      • Emulation
        • Products
        • Palladium Z1 Enterprise Emulation System
        • Palladium Dynamic Power Analysis
        • Palladium Hybrid
        • SpeedBridge Adapters
        • VirtualBridge Adapters
        • Emulation Development Kit
        • Virtual JTAG Debug Interface
        • Accelerated VIP
        • QuickCycles Services
      • Formal and Static Verification
        • Products
        • JasperGold Formal Verification Platform (Apps)
        • Assertion-Based Verification IP
      • FPGA-Based Prototyping
        • Products
        • Protium S1 Desktop Prototyping Platform
        • Protium X1 Enterprise Prototyping Platform
        • SpeedBridge Adapters
      • Planning and Management
        • Products
        • vManager Metric-Driven Signoff Platform
      • Simulation and Testbench
        • Products
        • Xcelium Parallel Simulator
        • Incisive Functional Safety Simulator
        • Cadence Specman Elite
      • Software-Driven Verification
        • Products
        • Perspec System Verifier
        • Indago Embedded Software Debug App
        • Virtual System Platform
      • Verification IP
        • Products
        • Accelerated Verification IP
        • Assertion-Based VIP
        • Verification IP (VIP) Catalog
      • Flows
        • Flows
        • Verification Solution for ARM-Based Designs
        • Automotive Functional Safety
        • Metric-Driven Verification Signoff
        • Mixed-Signal Verification
        • Power-Aware Verification Methodology
    • IP
      IP Overview

      An open IP platform for you to customize your app-driven SoC design.

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      Product Categories
      • Interface IP
        • IP
        • PCI Express IP
        • CCIX IP
        • USB IP
        • SerDes IP
        • Ethernet IP
        • MIPI IP
        • HD Display IP
      • Denali Memory IP
        • IP
        • NAND Flash IP
        • DDR IP
        • HBM2 IP
        • SD / SDIO / eMMC IP
        • Octal and Quad SPI Flash Controller and PHY IP
      • Tensilica Processor IP
        • IP
        • HiFi DSPs for Audio, Voice, and Speech
        • ConnX DSPs for Radar, Lidar, and Communications
        • Vision DSPs for Imaging, Vision, and AI
        • Fusion DSPs for IoT
        • DNA Processor Family for On-Device AI
        • Tensilica Customizable Processors
        • Tensilica Reference Configuration
      • Analog IP
        • IP
        • Analog IP
      • System / Peripherals IP
        • IP
        • 8051 Microprocessor IP
        • System Bus Peripherals
        • Audio Controllers
      • Verification IP
        • IP
        • Accelerated VIP
        • Assertion-Based VIP
        • Memory Models
        • Simulation VIP
        • Productivity Tools
        • Interconnect Solution
    • IC Package
      IC Package Design and Analysis Overview

      Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

      Overview Related Products A-Z

      Product Categories
      • IC Package Design
        • Products
        • Allegro Package Designer Plus
        • SiP Digital Architect
      • SI/PI Analysis Integrated Solution
        • Products
        • Allegro Sigrity SI Base
        • Allegro Sigrity Power-Aware SI Option
        • Allegro Sigrity Serial Link Analysis Option
        • Allegro Sigrity Package Assessment and Extraction Option
        • Allegro Sigrity PI Base
        • Allegro Sigrity PI Signoff and Optimization Option
      • SI/PI Analysis Point Tools
        • Products
        • Sigrity PowerSI
        • Sigrity PowerDC
        • Sigrity OptimizePI
        • Sigrity System Explorer
        • Sigrity Speed2000
        • Sigrity SystemSI
        • Sigrity Broadband SPICE
        • Sigrity Transistor-to-Behavioral Model Conversion (T2B)
        • Sigrity XtractIM
        • Sigrity XcitePI Extraction
      • Cross-Platform Co-Design and Analysis
        • Products
        • OrbitIO Interconnect Designer
        • IO-SSO Analysis Suite
      • Flows
        • Flows
        • Cross-Substrate Interconnects
        • IC/Package/PCB Co-Design
        • InFO Packaging Technology
        • What's New in Sigrity Technology
        • Virtuoso System Design Platform
        • PDN Design
    • SYSTEM INNOVATION
    • System Analysis
      System Analysis Overview

      Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

      Overview Related Products A-Z

      Product Categories
      • Electromagnetic Solutions
        • Products
        • Clarity 3D Solver
        • Sigrity XcitePI Extraction
        • Sigrity XtractIM
        • Sigrity PowerSI
      • Thermal Solutions
        • Products
        • Celsius Thermal Solver
      • Flows
    • Embedded Software
    • PCB Design
      PCB Design and Analysis Overview

      Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

      Overview Related Products A-Z Service Bureaus PCB Resources

      Product Categories
      • Design Authoring
        • Products
        • Allegro Design Entry Capture/Capture CIS
        • Allegro Design Publisher
        • Allegro Design Authoring
        • Allegro FPGA System Planner
      • PCB Layout
        • Products
        • Allegro PCB Designer
        • OrCAD PCB Designer
      • Library and Design Data Management
        • Products
        • Allegro ECAD-MCAD Library Creator
        • Allegro EDM Solution
        • Allegro PCB Librarian
        • Allegro Pulse
      • Analog/Mixed-Signal Simulation
        • Products
        • Allegro PSpice System Designer
        • OrCAD PSpice Designer
      • SI/PI Analysis Integrated Solution
        • Products
        • Allegro Sigrity Serial Link Analysis Option
        • Allegro Sigrity SI Base
        • Allegro Sigrity PI Base
        • Allegro Sigrity Power-Aware SI Option
        • Allegro Sigrity PI Signoff and Optimization Option
      • SI/PI Analysis Point Tools
        • Products
        • Sigrity PowerSI
        • Sigrity PowerDC
        • Sigrity OptimizePI
        • Sigrity System Explorer
        • Sigrity SystemSI
        • Sigrity Speed2000
        • Sigrity Broadband SPICE
        • Sigrity Transistor-to-Behavioral Model Conversion (T2B)
        • Sigrity PowerSI 3D EM Extraction Option
      • What's New in Allegro
        • Products
        • Board Layout
        • Schematic Capture
        • Data Management
      • What's New in Sigrity
        • Products
        • Sigrity 2018 Release
        • Sigrity Tech Tips
      • Flows
        • Flows
        • Multi-Board PCB System Design
        • Product Creation
        • ECAD/MCAD Co-Design
        • Allegro Right First-Time Design
        • IO-SSO Analysis Suite
        • 3D System Design Solutions
        • PDN Design
        • LPDDR4 Complete Solutions
        • Power Aware Signal Integrity Analysis
        • Interface-Aware Approach
        • Sigrity Serial Link Analysis
    • PERVASIVE INTELLIGENCE
    • AI IP Portfolio
    • AI / Machine Learning
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  • Solutions
    • INDUSTRIES
    • 5G Systems and Subsystems
    • Aerospace and Defense
    • Automotive
    • TECHNOLOGIES
    • 3D-IC Design
    • Advanced Node
    • Arm-Based Solutions
    • Cadence Cloud Portfolio
    • FPGA Development
    • Low Power
    • AI / Machine Learning
    • Mixed Signal
    • Photonics
  • Services
    • Services Overview

      Helping you meet your broader business goals.

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    • Design Services
    • Training
    • Methodology Services
    • Virtual Integrated Computer Aided Design (VCAD)
  • Support
    • Support
      Support Overview

      A global customer support infrastructure with around-the-clock help.

      More Cadence Online Support Portal

      • Support Process
        • 24/7 Support - Cadence Online Support

          Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.

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        • Software Downloads

          Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.

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      • Computing Platform Support
        • 24/7 Support - Cadence Online Support

          Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.

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        • Software Downloads

          Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.

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      • Customer Support Contacts
        • 24/7 Support - Cadence Online Support

          Locate the latest software updates, service request, technical documentation, solutions and more in your personalized environment.

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        • Software Downloads

          Cadence offers various software services for download. This page describes our offerings, including the Allegro FREE Physical Viewer.

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    • TRAINING COURSES
    • Custom IC / Analog / RF Design
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Advanced Nodes (ICADV)
        • Featured Courses
        • Virtuoso Layout for Advanced Nodes
        • Virtuoso Layout for Advanced Nodes: T1 Place and Route
        • Virtuoso Layout for Advanced Nodes: T2 Electromigration
      • Circuit Design and Simulation
        • Featured Courses
        • Virtuoso ADE Assembler Series
        • Virtuoso ADE Verifier
        • Design Checks and Asserts
        • Mixed-Signal IP and Testbench Reuse
        • Mixed-Signal Simulations Using Spectre AMS Designer
        • Spectre Accelerated Parallel Simulator
        • Spectre eXtensive Partitioning Simulator for Mixed-Signal Designs
        • Additional Courses
      • Electrically-Aware Design
        • Featured Courses
        • Spectre eXtensive Partitioning Simulator for Mixed-Signal Designs
        • Physical Verification System
        • Virtuoso Analog Design Environment
        • Virtuoso Electrically-Aware Design with Layout-Dependent Effects
        • Virtuoso Schematic Editor
        • Quantus Extraction Solution Series
        • Spectre Accelerated Parallel Simulator
      • Infrastructure
        • Featured Courses
        • Advanced SKILL Language Programming
        • SKILL Development of Parameterized Cells
        • SKILL Language Programming
        • SKILL Language Programming Fundamentals
        • SKILL Language Programming Introduction
        • SKILL Programming for IC Layout Design
      • Layout Design and Verification
        • Featured Courses
        • Virtuoso Layout for Advanced Nodes
        • Virtuoso Layout Pro Series
        • Virtuoso Space-Based Router
        • Virtuoso Floorplanner
        • Virtuoso Abstract Generator
        • Physical Verification Language Rules Writer
        • Virtuoso Connectivity-Driven Layout Transition
        • Virtuoso Layout Design Basics
        • Physical Verification System
        • Quantus Extraction Solution Series
      • Library Characterization
        • Featured Courses
        • Cadence Library Characterization and Validation
        • Virtuoso Liberate MX for Memory Characterization
        • Cadence Variety Statistical Library Characterization
        • Spectre eXtensive Partitioning Simulator for Mixed-Signal Designs
        • Spectre Accelerated Parallel Simulator
        • Virtuoso ADE Assembler Series
      • Modeling
        • Featured Courses
        • Analog Modeling with Verilog-A
        • Behavioral Modeling with VHDL-AMS
        • Behavioral Modeling with Verilog-AMS
        • Mixed-Signal Simulations Using Spectre AMS Designer
        • Real Modeling with SystemVerilog
        • Real Modeling with Verilog-AMS
        • Mixed-Signal IP and Testbench Reuse
        • Virtuoso ADE Explorer Series
      • RF Design
        • Featured Courses
        • Quantus QRC Transistor-Level T1: Overview and Technology Setup
        • Quantus QRC Transistor-Level T2: Parasitic Extraction
        • Quantus QRC Transistor-Level T3: Extracted View Flows and Advanced Features
        • Spectre RF Analysis Using Shooting Newton Method
        • Spectre RF Analysis using Harmonic Balance
        • Spectre Simulator Fundamentals Series
        • Virtuoso ADE Explorer Series
      • Variation Aware Design
        • Featured Courses
        • Virtuoso ADE Assembler S1: Introducing the Assembler Environment
        • Virtuoso ADE Assembler S2: Sweeping Variables, Simulating Corners, and Creating Run Plans
        • Virtuoso ADE Assembler S3: Circuit Checks, Device Asserts, and Reliability Analysis
        • Variation Analysis Using the Virtuoso ADE Assembler
        • Virtuoso Spectre Pro Series
        • Spectre eXtensive Partitioning Simulator for Mixed-Signal Designs
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

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        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • Languages and Methodologies
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Assertions
        • Featured Courses
        • SystemVerilog Assertions
        • Verification with PSL
      • Behavioral Language for AMS Simulation
        • Featured Courses
        • Behavioral Modeling with VHDL-AMS
        • Behavioral Modeling with Verilog-AMS
        • Real Modeling with SystemVerilog
        • Real Modeling with Verilog-AMS
      • High-Speed PCB Design
        • Featured Courses
        • Essential High-speed PCB Design for Signal Integrity
        • PCB Design at RF - multi-Gigabit Transmission, EMI Control, and PCB Materials
      • Scripting
        • Featured Courses
        • Perl for EDA Engineering
        • Tcl Scripting for EDA
      • Specman and UVMe
        • Featured Courses
        • Specman Advanced Verification
        • Specman Fundamentals for Block-Level Environment Developers
      • SystemC
        • Featured Courses
        • C++ Language Fundamentals for Design and Verification
        • SystemC Language Fundamentals
        • SystemC Synthesis with Stratus HLS
        • SystemC Transaction-Level Modeling (TLM 2.0)
      • SystemVerilog and UVM
        • Featured Courses
        • Real Modeling with SystemVerilog
        • SVA, Formal and JasperGold Fundamentals for Designers
        • SystemVerilog Accelerated Verification with UVM
        • SystemVerilog Advanced Register Verification Using UVM
        • SystemVerilog Assertions
        • SystemVerilog for Design and Verification
        • SystemVerilog for Verification
      • Verilog and VHDL
        • Featured Courses
        • VHDL Language and Application
        • Verification with PSL
        • Verilog Language and Application
        • Verilog for VHDL Users
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

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        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • Digital Design and Signoff
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Implementation
        • Featured Courses
        • Analog-on-Top Mixed-Signal Implementation
        • Innovus Implementation System (Block)
        • Innovus Implementation System (Hierarchical)
        • Virtuoso Digital Implementation
      • Equivalence Checking
        • Featured Courses
        • Conformal Low-Power Verification
        • Conformal ECO
        • Conformal Equivalence Checking
      • Silicon Signoff
        • Featured Courses
        • Basic Static Timing Analysis
        • Tempus Signoff Timing Analysis and Closure
        • Voltus Power-Grid Analysis and Signoff
      • Synthesis and Test
        • Featured Courses
        • Advanced Synthesis with Genus Stylus Common UI
        • Advanced Synthesis with Genus Synthesis Solution
        • Fundamentals of IEEE 1801 Low-Power Specification Format
        • Genus Synthesis Solution
        • Genus Synthesis Solution with Stylus Common UI
        • Joules Power Calculator
        • Low-Power Synthesis Flow with Genus Stylus Common UI
        • Low-Power Synthesis Flow with Genus Synthesis Solution
        • Test Synthesis Using Genus Synthesis Solution
        • Test Synthesis with Genus Stylus Comon UI
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

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        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

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    • IC Package Design and Analysis
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Cross-Platform Co-Design and Analysis
        • Featured Courses
        • OrbitIO System Planner
        • SiP Layout
      • IC Package Design
        • Featured Courses
        • Allegro Package Designer
        • SiP Layout
      • SI/PI Analysis Integrated Solution
        • Featured Courses
        • Sigrity SystemSI for Parallel Bus and Serial Link Analysis
        • Allegro Sigrity PI
        • Allegro Sigrity Package Assessment and Model Extraction
        • Allegro Sigrity SI Foundations
        • Sigrity PowerDC and OptimizePI
        • Sigrity PowerSI for Model Generation and Analysis
      • SI/PI Analysis Point Tools
        • Featured Courses
        • Sigrity SystemSI for Parallel Bus and Serial Link Analysis
        • Allegro Sigrity Package Assessment and Model Extraction
        • Sigrity PowerDC and OptimizePI
        • Sigrity PowerSI for Model Generation and Analysis
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

          Read more

        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

          Read more

    • PCB Design and Analysis
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Analog/Mixed-Signal Simulation
        • Featured Courses
        • Advanced PSpice for Power Users
        • Allegro AMS Simulator
        • Allegro AMS Simulator Advanced Analysis
        • Analog Simulation with PSpice
        • Analog Simulation with Pspice Advanced Analysis
      • Design Authoring
        • Featured Courses
        • Allegro System Design Authoring
        • Allegro Design Entry HDL Basics
        • Allegro Design Entry HDL Front-to-Back Flow
        • Allegro Design Entry HDL SKILL Programming Language
        • Allegro Design Entry Using OrCAD Capture
        • Allegro Design Reuse
        • Allegro System Architect
        • Allegro Team Design Authoring
      • Library and Design Data Management
        • Featured Courses
        • Allegro Design Workbench for Administrators
        • Allegro Design Workbench for Engineers and Designers
        • Allegro Design Workbench for Librarians
        • Allegro PCB Librarian
      • PCB Layout
        • Featured Courses
        • Allegro Update Training
        • Allegro High-Speed Constraint Management
        • Allegro PCB Editor Basic Techniques
        • Allegro PCB Editor Intermediate Techniques
        • Allegro PCB Editor SKILL Programming Language
        • Allegro PCB Router Basics
      • SI/PI Analysis Integrated Solution
        • Featured Courses
        • Allegro Sigrity PI
        • Allegro Sigrity SI Foundations
        • Model Generation and Analysis using PowerSI, Broadband SPICE and 3D-EM​
        • Sigrity PowerDC and OptimizePI
        • Sigrity SystemSI for Parallel Bus and Serial Link Analysis
      • SI/PI Analysis Point Tools
        • Featured Courses
        • Model Generation and Analysis using PowerSI, Broadband SPICE and 3D-EM
        • Sigrity PowerDC and OptimizePI
        • Sigrity SystemSI for Parallel Bus and Serial Link Analysis
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

          Read more

        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

          Read more

    • System Design and Verification
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • Emulation and Acceleration
        • Featured Courses
        • Acceleration with Palladium XP
        • Protium Rapid Prototyping Platform
      • Formal Verification
        • Featured Courses
        • SVA, Formal and JasperGold Fundamentals for Designers
        • SystemVerilog Assertions
        • Verification with PSL
      • Planning and Management
        • Featured Courses
        • Foundations of Metric Driven Verification
        • Metric Driven Verification Using Incisive vManager
        • vManager Tool Usage in Batch Mode
      • Scripting
        • Featured Courses
        • Perl for EDA Engineering
        • Tcl Scripting for EDA
      • Simulation, Testbench and Debug
        • Featured Courses
        • Incisive Functional Safety Simulator
        • Incisive Simulation Performance Optimization
        • Indago Debug Analyzer App
        • Low-Power Simulation with IEEE Std 1801 UPF
        • Xcelium Simulator
        • Xcelium Integrated Coverage
      • SystemC
        • Featured Courses
        • C++ Language Fundamentals for Design and Verification
        • SystemC Language Fundamentals
        • SystemC Synthesis with Stratus HLS
        • SystemC Transaction-Level Modeling (TLM 2.0)
      • Specman and UVMe
        • Featured Courses
        • Specman Advanced Verification
        • Specman Fundamentals for Block-Level Environment Developers
      • SystemVerilog and UVM
        • Featured Courses
        • Real Modeling with SystemVerilog
        • SVA, Formal and JasperGold Fundamentals for Designers
        • SystemVerilog Accelerated Verification with UVM
        • SystemVerilog Advanced Register Verification Using UVM
        • SystemVerilog Assertions
        • SystemVerilog for Design and Verification
        • SystemVerilog for Verification
      • Verification IP
        • Featured Courses
        • VIP Basic Building Blocks and Usage
      • Verilog and VHDL
        • Featured Courses
        • VHDL Language and Application
        • Verification with PSL
        • Verilog Language and Application
        • Verilog for VHDL Users
      • Delivery Methods
        • Instructor-Led Training

          Instructor-led training [ILT] are live classes that are offered in our state-of-the-art classrooms at our worldwide training centers, at your site, or as a Virtual classroom.

          Read more

        • Online Training

          Online Training is delivered over the web to let you proceed at your own pace, anytime and anywhere.

          Read more

    • Tensilica Processor IP
      Training Overview

      Get the most out of your investment in Cadence technologies through a wide range of training offerings.

      Overview All Courses Asia Pacific EMEANorth America

      Tools Categories
      • ConnX DSPs
        • Featured Courses
        • Tensilica ConnX B10 DSP
        • Tensilica ConnX B20 DSP
        • Tensilica ConnX BBE16EP Baseband Engine
        • Tensilica ConnX BBE32EP Baseband Engine
        • Tensilica ConnX BBE64EP Baseband Engine
      • Fusion DSPs
        • Featured Courses
        • Tensilica Fusion F1 DSP
        • Tensilica Fusion G3 DSP
        • Tensilica Fusion G6 DSP
      • HiFi DSPs
        • Featured Courses
        • Tensilica HiFi 2/EP/Mini Audio Engine ISA
        • Tensilica HiFi 3 Audio Engine ISA
        • Tensilica HiFi 4 DSP
        • Tensilica HiFi 5 DSP
      • Tensilica Processors
        • Featured Courses
        • Tensilica Instruction Extension Language and Design
        • Tensilica Xtensa LX Processor Fundamentals
        • Tensilica System Modeling using XTSC
        • Tensilica Xtensa LX Hardware Verification and EDA
        • Tensilica Xtensa LX Processor Interfaces
        • Tensilica Xtensa NX Hardware Verification and EDA
        • Tensilica Xtensa NX Processor Fundamentals
        • Tensilica Xtensa NX Processor Interfaces
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  • Virtuoso Layout Pro: T4 Advanced Commands (XL)

Virtuoso Layout Pro: T4 Advanced Commands (XL)

Enroll Online Subscription
Online Courses
Instructor-Led Schedule
Date Version Country Location
28 Jan 2020 IC6.1.7 France Velizy-Paris
France
ENROLL
18 Feb 2020 IC6.1.7 Sweden Kista-Stockholm
Sweden
ENROLL
18 Feb 2020 IC6.1.7 United Kingdom Bracknell-London
United Kingdom
ENROLL
03 Mar 2020 IC6.1.7 Germany Feldkirchen-Munich
Germany
ENROLL
28 Apr 2020 IC6.1.7 France Velizy-Paris
France
ENROLL
16 Jun 2020 IC6.1.7 Germany Feldkirchen-Munich
Germany
ENROLL
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE
Version Region
IC6.1.7 North America ENROLL
IC6.1.6 North America ENROLL
Other Regions EXPRESS INTERESTINQUIRE

Length : 1/2 day

Course Description

Click here for Course Preview.

For classroom delivery, this course is taught as half day session (4 hours).

In this course, you analyze how to generate clones as free objects, grouped objects, and synchronized family. You use the Create Synchronous Copy feature, generate clones from modgen, create mutant clones, and analyze how to effectively reuse existing structures in your layout by using clone and copy. You create layout structures using features of the Generate Clones and Create Synchronous Copy commands. You update your layout after an Engineering Change Order (ECO) and update the layout to reflect the pin name changes between schematic and layout by using the Update Components and Nets (UCN) command. You use the Design-Rule-Driven (DRD) Editing and the DRD Interactive Compactor features in the Virtuoso® Layout Suite (XL).

View the videos available in the course in the links given below:

Generating Clones as Free Objects

Generating Clones as Grouped Objects

Generating Clones as Synchronized Family

Generating Synchronous Copy of Wires

Generating Clones From Modgen

Creating Mutant Clones

Updating the Net and Pin Names – Overview

Learning Objectives

After completing this course, you will be able to:

  • Create your layout structures using Generate Clones and Create Synchronous Copy features
  • Update your layout after an Engineering Change Order (ECO)
  • Use the Design-Rule-Driven (DRD) Editing and the DRD Interactive Compactor features

Software Used in This Course

  • Virtuoso Layout Suite XL

Software Release(s)

  • IC 6.1.7

Course Agenda

Note that this course can be tailored to better meet your needs – contact the Cadence training staff for specifics.

Day 1 (Note: This is a half-day course.)

  • Generating Clones
  • Updating Connectivity and Nets
  • Design-Rule-Driven Editing

Audience

  • Layout Design Engineers
  • Layout CAD Managers

Prerequisites

You must have:

  • Experience with layout design.
  • Knowledge of schematic symbols and MOS devices.
  • A basic knowledge of UNIX/Linux.

Or you must have completed the following courses:

  • Virtuoso® Layout Pro: T1 Environment and Basic Commands (L)

  • Virtuoso® Layout Pro: T2 Create and Edit Commands (L)

  • Virtuoso® Layout Pro: T3 Basic Commands (XL)

  • Please note that some of the training features will require loading a set of SKILL files. It is recommended to include these files in your standard Virtuoso settings.

Related Courses

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

Course ID: 85090

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“Thank you very much for this excellent training. This training significantly improved our group layout tools understanding and capabilities. It was much more than I expected from this training!”

Mark Rozental, Motorola Solutions

"Virtuoso Layout Pro is improving the well-known available tools and is introducing new powerful features that allow to increase the productivity in the daily work by decreasing time and effort."

Paolo F. Pino, NXP Semiconductors

“Very good training, fits my needs in short timeframe.”

Frederic Duez, STMicroelectronics

"(...) instructor very competent and available to answer questions and/or analyse real layout examples."

Alberto Pedron, Infineon

“Within our internal training analysis the customized Virtuoso Layout Pro training has reached the best score since 2003!!”

Andre Vullhorst, NXP Semiconductors

"Instructor gave real world demo which was very helpful."

Jacqueline Gaffney, Skyworks Solutions Inc.

"Very good as a refresher for those who already have worked with Virtuoso in IC6.1."

Alexander Mora Sanchez, NXP Semiconductors

"I really liked the teacher's skills."

Stefano Ruzzu, Infineon

 
 
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