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    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • System Design and Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation
          • Formal and Static Verification
          • FPGA-Based Prototyping
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
          • Protium X1 Enterprise Prototyping Platform
          • System VIP
          • RESOURCES
          • Flows
      • IP
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          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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        • PRODUCT CATEGORIES
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
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          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
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  • Analog Modeling and Simulation with SPICE



Analog Modeling and Simulation with SPICE

Instructor-Led Schedule
Date Version Country Location
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE

Length : 4 days

Course Description

The purpose of the course is to help circuit designers better understand the operation of a SPICE circuit simulator and semiconductor device models with emphasis on Deep-Submicron (DSM) transistors. The course also addresses the different levels of modeling, structural and behavioral, simulation controls available to the user and new types of analysis such as steady-state particularly suited for RF design. Participants will have an opportunity to experiment on workstations/PCs the various concepts presented in the course.

Learning Objectives

At the end of this training people should have:

  • Improved their knowledge in Electrical Simulation and Modeling
  • Learnt how to solve Convergence and Accuracy Issues
  • Learnt about deep-submicron transistor behavior and the corresponding SPICE models
  • Learnt about new functionality and features
  • Understood how to simulate very large circuits and get the quickest turn-around
  • Acquired some basic knowledge in Analog Hardware Description Languages.

Audience

  • Analog IC Designers
  • Analog Designers
  • RF Designers
  • IC Designers
  • IC Process Characterization/Modeling Engineers
  • Analog/Mixed-Signal IC Designers
  • Cell Library Development Engineers
  • Electrical Engineers

Software

Workstations/PCs equipped with Cadence Virtuoso Schematic Editor, Virtuoso Analog Design Environment [ADE], and Analog Simulators from the MMSIM portfolio tools such as Spectre, Ultrasim and APS. If the course takes place at a customer site, third-party simulators can be used if integrated in ADE.

Prerequisites

  • There are no prerequisites to attend this course.

Course Agenda

Day 1 - The SPICE Simulator/IC Technology Scaling/SPICE Algorithms

  • History of SPICE, past, present and future developments
  • Technology Scaling: Impact on Integrated Circuits and simulation technology
  • SPICE algorithms and simulation options for accuracy and speed
  • SPICE LAB: simulation accuracy and options.

Day 2 - SPICE Simulation/Modeling

  • Simulation Models: Definitions, Built-in SPICE element models
  • Basic models: diode, BJT, JFET, MOSFET
  • Advanced BJT models for DSM: VBIC95, Mextram
  • SPICE LAB: diode parameter extraction.

Day 3 - MOSFET/Complex Models

  • MOSFET device: physical phenomena, geometry specifics and associated models
  • Deep Submicron MOS models for current technologies: BSIM3/4, PSP, EKV3
  • Deep Submicron MOS models: Parameter variation and Monte-Carlo simulation
  • Higher-level Modeling: Introduction to Analog Hardware Description Languages (Verilog-AMS)
  • SPICE LAB: DSM MOS characteristics, behavioral example

Day 4 - State-of-the-Art SPICE Simulation

  • Convergence, Accuracy, Speed
  • RF Simulation: RF Circuit Design Issues, Simulation Algorithms and Analysis Types
  • Very Large Circuit Simulation: FASTSPICE and Parallel Simulation
  • SPICE LAB: convergence fixes, RF analysis.

Who is the trainer?

Andrei Vladimirescu is a key contributor to the SPICE program development at the University of California, Berkeley. His key achievements include the SPICE 2G6 release, on which leading commercial versions like HSPICE are based, a parallel SPICE called CLASSIE for Single-Instruction Multiple-Data (SIMD) architectures and the design of a SPICE HW accelerator. Andrei is the author of the leading text on circuit simulation, The SPICE Book, published by J. Wiley and Sons. In the EDA industry he managed several teams as R&D director for analog/mixed-signal tools at Daisy, Analog Design Tools, Valid and Cadence. He is currently a professor at UC Berkeley and Institut Superieur d?Electronique de Paris.

Click here to view course learning maps, and here for complete course catalogs.

Course ID: 85086

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“Very satisfied with the overall training experience- from the facilities to the labs to the course material. Very happy with the instructor - had a very deep understanding of the material and was able to answer all of our questions.”

Roy Newman, Intel

"The course offers a comprehensive overview of Spice, as well as device modelling. It is well suited for junior but also experienced IC designers."

Mirjana Banjevic, Sensirion

“Very good course. Especially due to the excellent instructor.”

Zelig Wayner, Intel

"As an analog design automation engineer, the course contributed a lot to my understanding of spice simulators and convergence methods. Andrei Vladimirescu's explanations were very simple and clear."

Asala Mittanis, Intel

"I am very satisfied with what I learned. It was the best trainer possible."

Alexandru Dan Timaru, Infineon Technologies

“Very rarely do you get to be taught by one of the founders of a tool! Andrei knew everything about the tool, which most trainers on the same subject would not know.”

Peter Grove, Dialog Semiconductor

“I enjoyed and learned a lot. It was very beneficial to me.”

Andrey Godkin, Intel

“The 4 days of learning SPICE were perfectly organized. And most of all it was an honor and fun to learn from Andrei Vladimirescu. I liked the profound knowledge and experience and how he let us participate from that. This course is as good as it could be.”

Christof Hielscher, X-FAB Semiconductor Foundries

 
 

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