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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • System Design and Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation
          • Formal and Static Verification
          • FPGA-Based Prototyping
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
          • Protium X1 Enterprise Prototyping Platform
          • System VIP
          • RESOURCES
          • Flows
      • IP
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          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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          • Electromagnetic Solutions
          • RF / Microwave Design
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
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      • PCB Design and Analysis
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          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
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          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
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      • AI IP Portfolio
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  • Foundations of Metric Driven Verification



Foundations of Metric Driven Verification

Online Courses
Instructor-Led Schedule
Date Version Country Location
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE
Version Region
14.1 Online ENROLL
Other Versions Online EXPRESS INTERESTINQUIRE

Length : 1 day

Course Description

This is a lecture-only class.

Metric Driven Verification or MDV is a powerful layer of Methodology that sits above the Verification Testbench Environment. It provides guidelines and tools for using/analyzing metrics and automation to maximize the benefits of the verification testbench. It is a data-driven decision-based flow that improves the predictability, productivity, and quality of the verification effort.

Learning Objectives

After completing this course, you will be able to:

  • Recognize current industry verification challenges
  • Explore Metric Driven Verification
    • Understand how this methodology addresses the current verification challenges
  • Understand the different phases of the MDV Methodology Cycle
  • Understand what is plan based MDV
  • Understand what is testcase driven MDV
  • Construct a verification plan or vPlan and run a regression
  • Perform plan and metrics analysis
  • Perform regression results management

Software Used in This Course

  • Incisive 14.1 and above

Software Release(s)

Incisive_Enterprise_Simulator_XL - 29651

Modules in this Course

  • What are the current industry verification challenges?
  • What is Metric Driven Verification or MDV?
    • How does this address current verification challenges?
  • Different phases of the MDV Methodology Cycle
  • What is plan based MDV?
  • What is testcase driven MDV?
  • Planning and regression running
  • Analysis and regression results management

Audience

  • Verification engineers

Prerequisites

You must have experience with or knowledge of the following:

  • Methodology-based verification like a UVM in order to understand MDV

Related Courses

Metric Driven Verification Using Incisive vManager

Click here to view course learning maps, and here for complete course catalogs.

This course, both classroom training or online iLS, is prescribed as a pre-requisite for the MDV vManager course mentioned above.

Course ID: 84506

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