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  • Voltus Power-Grid Analysis and Signoff



Voltus Power-Grid Analysis and Signoff Training

Instructor-Led Schedule
Online Courses
Date Version Country Location
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE
Version Region
23.1 Online ENROLL
22.1 Online ENROLL
Other Versions Online EXPRESS INTERESTINQUIRE

Length: 2 Days (16 hours)

Become Cadence Certified

Course Description

Note: This course is based on the default user interface and not the Stylus Common User Interface.  Please consult with your design team or Cadence AE before selecting this course instead of the Voltus™ Power-Grid Analysis and Signoff with Stylus Common UI course. If there is not a clear preference, please select the Voltus Power-Grid Analysis and Signoff with Stylus Common UI course.

This is an Engineer Explorer course for designers who need a comprehensive and detailed understanding of power-rail analysis for advanced processes.

In this two-day course, you explore the need for power-rail analysis and use the Cadence® Voltus IC Power Integrity Solution software to run Static and Dynamic Power and Rail Analyses. On the first day, you identify the features of Voltus, import design data, and run design sanity checks. You also run Early Rail Analysis using the Innovus™ Implementation System. You create a technology library and power-grid libraries. On the second day, you run static power and rail analyses. You also run dynamic power and rail analyses and analyze the results. You identify different IR-aware ECO optimization techniques and develop a chip package co-design model. 

Learning Objectives

After completing this course, you will be able to:

  • Identify the features and capabilities of Voltus IC Power Integrity Solution
  • List the data import methods and run design sanity checks
  • Execute Early Rail Analysis to detect problems in the early stage of power-grid design
  • Generate Power-Grid Libraries for power-grid analysis
  • Execute static power, IR drop and electromigration analyses
  • Run dynamic power and rail analyses and analyze the results
  • Identify IR Aware ECO techniques to mitigate IR drop issues
  • Develop the chip package co-design model

Software Used in This Course

  • Voltus IC Power Integrity Solution
  • Innovus Implementation System

Software Release(s)

SSV231, DDI231

Modules in this Course

  • Introduction to the Voltus IC Power Integrity Solution 
  • Design Data Importing and Sanity Checks
  • Early Rail Analysis
  • Power-Grid View Library Generation
  • Static Power and Rail Analysis
  • Dynamic Power and Rail Analysis

Audience

  • Analog/Mixed-Signal IC Designers
  • Custom Circuit Designers
  • Design Engineers
  • Digital IC Designers
  • IC Designers
  • Place and Route Designers
  • Verification Engineers

Prerequisites

You must have experience with or knowledge of the following:

  • Place-and-route tools
  • UNIX or Linux OS

Related Courses

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

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Course ID: 82169

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"Very good training course, the presenter had in depth knowledge of the tool so he was able to answer all technical questions in detail."

Efthimios Hatzidis, Dialog Semiconductor

"Very good lecturer. The timing on 2 days is perfect."

Frederic Dulucq, IN2P3 OMEGA

“Completely satisfied. I got what I need.”

Fulvio Pugliese, Global Foundries

“Good course. You learn how to use Voltus Tool in daily work. All aspects are covered.”

Raffaele Ventola, Dialog Semiconductor

"It was an interesting course. I received information also about other tools which can exchange data with Voltus."

Stefano Serafini, austriamicrosystems

“I liked the background information and the insight necessary to solve problems.”

Michal Navratil, ONSemiconductor

 
 
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