Specman Advanced Verification

This is an Engineer Explorer course. You explore topics in a less formal and more user-directed pace. The course addresses advanced features of the e language and the Xcelium^™ simulator implementation of the e language. To undertake this training, you must either have successfully completed the training course "Specman^® for Block-Level Environment Developers" or have equivalent prior experience.

This course describes advanced features of the e language and Xcelium simulator implementation of the e language in the wider context of scaling and reusing verification environments from the block level through large system-level environments. You typically construct such environments from components of multiple languages, such as e, SystemC, and SystemVerilog. The course describes and follows the UVM recommendations including the Cadence UVM e extensions.

Cadence Design Systems arranges this training in response to user inquiries, holds the training at the user-selected site, and focusses on the user selection of topics.

The training can address a variety of advanced topics including:

• Exploring best practices to support system debug
• Linting your e code with the Xcelium HDL Analysis tool
• Improving coverage metrics by using the coverage API, configurable ranges and coverage-driven distributions
• Extending the e language by defining macros
• Modeling registers and memories by using the open-source UVM package vr_ad
• Dynamically accessing the e program structure and values by using the reflection API
• Implementing multiple-driver and multiple-thread sequence use models
• Improving sequence driving performance by using the sequence API
• Implementing multi-language communication, synchronization and configuration by using the UVM Multi-language Open Architecture library
• Improving regression performance by adopting efficient simulation use models and by using the Specman Advanced Option (SAO)

After completing this course, you will be able to:

• Implement best practices to support design and testbench debug
• Customize and utilize the Xcelium HDL Analysis to "lint" your testbench code
• Improve coverage metrics by using the coverage API, configurable ranges and coverage-driven distributions
• Extend the e language by defining macros
• Model registers and memories by using the vr_ad package
• Dynamically access the e program structure and values by using the reflection API
• Implement multiple-driver and multiple-thread sequence use models
• Improve sequence driving performance by using the sequence API
• Implement multi-language communication, synchronization and configuration by using the UVM Multi-language Open Architecture library
• Improve regression performance by adopting efficient simulation use models and by using the Specman Advanced Option (SAO)

• Specman Fundamentals for Block-Level Environment Developers
• Metric Driven Verification Using Cadence vManager

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.