Conformal Equivalence Checking Training
Date | Version | Country | Location | |
---|---|---|---|---|
06 - 07 May 2025 | 24.1 | Germany | Feldkirchen-Munich Germany |
ENROLL |
Scheduled upon demandOn demand | EXPRESS INTERESTINQUIRE |
Version | Region | |
---|---|---|
24.1 | Online | ENROLL |
23.1 | Online | ENROLL |
Other Versions | Online | EXPRESS INTERESTINQUIRE |
Length: 2 Days (16 hours)
Course Description
In this course, you learn to use the Conformal® Equivalence Checker to perform functional verification. You learn the basic flow of equivalence checking and how to run hierarchical comparisons of designs. The lab exercises follow major topics and are designed to be directly applicable to design and design verification. Upon completion of this course, you will be able to set up and verify your designs, analyze the results, and debug failing results.
Learning Objectives
After completing this course, you will be able to:
- Use Conformal logic equivalence checking for flat and hierarchical design comparison
- Read libraries and designs
- Apply design constraints and modeling directives
- Apply the mapping process and debug unmapped key points
- Apply the compare process and debug non-equivalent points
Software Used in This Course
- Conformal XL
Software Release(s)
CONFRML251
Modules in this Course
- Overview of the Conformal Product Family
- Introduction to Logic Equivalence Checking
- LEC Flow: Setup Mode
- LEC Flow: LEC Mode
- Hierarchical Comparison of Designs
- Debugging Setup of a Design
- Debugging Mapping
- Debugging Nonequivalences
- Debugging Aborts
Audience
- ASIC Designers
- Logic Designers
- Verification Engineers
Prerequisites
You must have experience with or knowledge of the following:
- HDL
- Logic Design
Related Courses
Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.
Free Online Training Bytes (Videos)
"The course completely fulfilled my expectations. The learning material included all the required to running complete equivalence check, including debug sessions and lab exercises for practice.(...) I recommend this course to any LEC user, it is highly beneficial."
Chanan Yom Tov, Intel

"The trainer was extremely competent. He also shared (...) practical issues (...) which was absolutely helpful. Very good."
Anton Borovich, Elvees

"As debugging the non-equivalences has always been the hardest part for me, I liked the description of the GUI and the Conformal commands in the training. It was also a good opportunity to ask for tips and tricks to speed up the debugging process."
Vincent Debout, Atmel

"Good job which is really helpful for my projects."
Dmitry Krasnobrov, ICC Milandr

"The training was very good and helpful."
Markus Boll, EDC Electronic Design Chemnitz

"Highly professional."
Radim Mlcousek, ONSemiconductor

"Fruitful training session in a pleasant atmosphere."
Christian Scherner, NXP Semiconductors

"Training was very useful and practical-oriented.”
Leonid Menshenin, Elvees

“Training is very complete and labs really help to put all the knowledge into practice.”-Online Course-
Jose Rojas, Intel