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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
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          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • Allegro X Design Platform
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Resources Hub
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      • Computational Fluid Dynamics
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        • Hyperscale Computing
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  • Virtuoso Analog Design Environment



Virtuoso Analog Design Environment

Instructor-Led Schedule
Date Version Country Location
Scheduled upon demandOn demand EXPRESS INTERESTINQUIRE

Length: 3 days (24 Hours)

Digital Badge Available

Course Description

In this course, you use the Virtuoso® Analog Design Environment L software to set up and control analog and mixed-signal simulations. You run analog simulations using the Spectre® simulator. You then explore and run simulations with the Virtuoso Accelerated Parallel Simulator (APS). You analyze simulation results dispalyed in the Virtuoso Visualization and Analysis XL waveform display tool. You also explore the Component Description Format (CDF) and annotate simulation results on the schematic. You run specialized simulations, including device checking and DC match, and then run parametric analysis. Subcircuit and Macromodel usage is also explored. Finally, you apply the OCEAN scripting language to run simulations in batch mode.

Learning Objectives

After completing this course, you will be able to:

  • Simulate circuits using the Virtuoso Analog Design Environment with the Spectre Circuit simulator and the Accelerated Parallel Simulator
  • Perform DC, AC, and Transient analyses effectively
  • Analyze simulation results using the Visualization and Analysis XL waveform display tool
  • Modify output waveforms using the calculator and various assistants
  • Use the Direct Plot utility
  • Use dependent expressions to create and set output
  • Perform circuit checks to determine violations after the simulation
  • Use the Component Description Format (CDF) to modify component parameters
  • Use CDF parameters to control result annotation on the schematic
  • Run parametric and stability analyses
  • Use macromodels, subcircuits, and inline subcircuits in your design
  • Use the Hierarchy Editor to create design configurations
  • Use the Open Command Environment for Analysis (OCEAN) scripting language to run batch simulations

Software Used in This Course

  • Virtuoso Analog Design Environment L
  • Virtuoso Schematic Editor L
  • Virtuoso Visualization & Analysis XL
  • Spectre Classic Simulator
  • Spectre Accelerated Parallel Simulator

Software Release(s)

IC618, SPECTRE18.1

Modules in this Course

  • Introduction to Virtuoso Design Environment
  • The Virtuoso Analog Design Environment L
  • Analog Simulation Setup and Details
  • Simulation Results in Virtuoso Visualization and Analysis XL
  • Analysis of Simulation Results
  • The Component Description Format (CDF)
  • Performing Result Annotation
  • Parametric and Stability Analysis
  • Analysis of Macromodels, Subcircuits, and Inline Subcircuits
  • The Hierarchy Editor
  • The OCEAN Scripting Language

Audience

  • Analog/Mixed Signal IC Designers
  • Custom Circuit Designers

Prerequisites

You must have experience with or already have knowledge of the following:

  • UNIX or Linux OS

It is good to have experience with the following software:

  • Virtuoso Schematic Editor

Related Courses

  • Virtuoso Schematic Editor

Please see course learning maps at this link for a visual representation of courses and course relationships. Regional course catalogs may be viewed here.

Course ID: 82083

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"I am totally satisfied and am looking forward to attending the next course. I specifically like the labs because they helped me to learn the most that I expected to."

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"I have been using ADE-L and ADE-XL on my own before the training. However I learnt a lot with advanced labs. The course is very clear and complete. The training and the labs fully meet my expectations to be able to use both ADE-L and ADE-XL daily now."

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Geoffry Brehmer, AMS

“I am very pleased with the course and overall organization. I specifically like how the lab manual is written because it makes me this course much easier to follow.”

Marijan Herceg, University of J.J. Strossmayer

 
 
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