Best-in-class USB Type-C Verification IP for your IP, SoC, and system-level design testing.

The Cadence® Verification IP (VIP) for USB Type-C™ is a complete, mature and comprehensive verification IP (VIP) for the USB Type-C and Power Delivery protocols. It provides full timing and bus functional modeling of USB Type-C and Power Delivery (PD). The Type-C VIP provides support for USB Type-C Receptacles and Plugs. As Plug, it can be configured to have none/1/2 cable plugs embedded. Incorporating the latest protocol updates, the USB Type-C VIP is not only just a complete bus functional model (BFM) for the DUT but it also provides integrated automatic protocol checks and coverage model. USB Type-C VIP is designed in such a way that it is easy for you to integrate in testbenches for IP, System-on-chip (SOC), and system level. The USB Type-C VIP helps you to reduce time to test by accelerate verification closure and ensure end product quality.

The USB Type-C VIP runs on all major simulators and supports all main verification languages such as Verilog, System Verilog and e alongside with industry-standard methodologies for Testbench writing such as Universal Verification Methodology (UVM) and Open Verification Methodology (OVM).

Supported Specification: Universal Serial Bus Type-C Cable and Connector Specification, Revision 1.3, 14 July 2017 and Universal Serial Bus Power Delivery Specification, Revision 3.0, V1.1, 12 Jan 2017.

USB4 diagram

Product Highlights

  • Support for Testbench languages such as SystemVerilog, UVM, OVM, and e
  • Runs on all major simulators such as Xcelium, VCS or MTI
  • Generation of constraint-random bus traffic
  • Dynamic activation and reconfigure the VIP attributes anytime during the simulation
  • Register interface flow to change timing parameters to reduce simulation time
  • Built-in verification plan, protocol checks and coverage model
  • Callback access at multiple TX and RX queue points for Scoreboarding, collect data coverage and data manipulation
  • Support for trace debug capability and packet tracker

Key Features

The following table describes key features from the specifications that are implemented in the VIP:

Feature Name


Receptacle and Plug Interfaces

  • Receptacle interface with support for port partner, Plug interface with support for SOP'/SOP"/none (has 1/2/0 cablePlugs), Receptacle detection of Plug orientation.

Type-C Configuration

  • Supports Type-C with Host (DFP)/Device (UFP) configuration, Type-C with DFP as source configuration, Type-C with UFP as Sink configuration.
  • Supports Type-C with DFP as DRP (Source/Sink) configuration, Type-C with UFP as DRP (Source/Sink) configuration.

Type-C Attach and Detach Detection

  • Presently supports the detection.

Type-C Analog Signaling

  • Presently supports signals interfaces: Analog signaling using SV Nettype, strength modeling, and digital signals.

Type-C Debug Accessory Mode

  • Supports Debug Accessory Mode


  • Serial (using svNetType for CC pin)

Biphase Mark Coding (BMC)

  • Supports Biphase Mark Coding (BMC) over CC.

Protocol Traffic

  • Generates all PD transactions such as OrderedSets and Data/Control Messages
  • Responds to PD transactions

4b5b Encoding

  • Encodes 4-bit data to 5-bit symbols for transmission and decodes 5-bit symbols to 4-bit data for consumption by the receiver.


  • Supports the physical layer ordered sets such as SOP, SOP', SOP", Hard Reset, Cable Reset, SOP'_Debug, and SOP"_Debug.

Physical Layer

  • Physical layer data flow, signaling scheme, bit rate drift, trailing edge, idle detection, clock recovery, and lock onto the packet preamble.

Control Message

  • Supports control messages including GoodCRC, GotoMin, Accept, Reject, Ping, PS_RDY, Get_Source_Cap, Get_Sink_Cap, DR_Swap, PR_Swap, VCONN_Swap, Wait, Soft_Reset, Not_Supported, Get_Source_Cap_Extended, Get_Status, FR_Swap, Get_PPS_Status, and Get_Country_Codes.

Data Message

  • Supports data messages including Source_Capabilities, Sink_Capabilities, Request, Battery_Status, Alert, and Get_Country_Info.

Extended Message

  • Supports extended messages including Source_Capabilities_Extended, Status, Get_Battery_Cap, Get_Battery_Status, Battery_Capability, Get_Manufacturer_Info, Manufacturer_Info, Security, Firmware_Update, PPS_Status, Country_Codes, and Country_Info.

Vendor-Defined Message

  • Vendor-defined messages such as Discover Identity, Discovery SVIDs, Discover Modes, Enter Mode, Exit Mode, and Attention.

Protocol Layer

  • Message transmission and reception, state behaviors, use of timers, error handling, and AMS collision avoidance.

Policy Engine

  • Source/Sink Port State Machine


  • Hard Reset, Soft Reset and Cable Reset operations

Source Discovery of CablePlug

  • Supports Source discovery of CablePlug

Built-In Self-Test

  • BIST Carrier Mode 2 and BIST Test Data


  • VCONN Swap, Power Role Swap, Data Role Swap, Fast Role Swap operations

Integration of USB Communication

  • Supports configuration and traffic for USB versions 2.0, 3.0, and 3.1

DisplayPort 2 Lane

  • Supports DisplayPort 2 Lane + USB3.0 operations, bypass entry to DisplayPort alternate mode, and automatic entry into DisplayPort alternate mode

DisplayPort 4 Lane

  • Supports DisplayPort 4 lane operations, bypass entry to DisplayPort alternate mode, and automatic entry into DisplayPort alternate mode

Register Interface

  • Change the severity (Fatal, Error, Warning, Info) of protocol assertions
  • Control the functionality such as directing state transitions, RDO's content
  • Store VIP model information such as power role, data role, policy engine states, protocol transmission/reception/hard-reset states, which are easily accessible to the testbench

Error Injection

  • Pre-defined error injections such as Crc, 4b5b, PreamblePattern, PreambleBmc, Bmc for PD OrderedSets and Messages, and discarding a packet. Additional Error Injection Scenarios can be generate through VIP callbacks

Compliance Testsuite

  • Contains hundreds of protocol checks to verify that the DUT adheres to the protocol rules defined in the USB Type-C and PD Specification

Simulation Test Suite

Extensive testsuite, coverage model and verification plan with clear linkage to the specification for simple and fast compliance testing.

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