Overview

Best-in-class eUSB2v2 Verification IP for your IP, SoC, and system-level design testing.

The Cadence Verification IP (VIP) for eUSB2v2 is a complete VIP solution for the embedded USB2 (eUSB2) Version 2.0. It provides a mature and comprehensive verification IP (VIP) for the eUSB2v2 protocol. Incorporating the latest protocol updates, the eUSB2v2 VIP is not only a complete bus functional model (BFM) for the eUSB2v2 DUT, but it also provides integrated automatic protocol checks and coverage models.

eUSB2v2 diagram 1

Product Highlights

  • Supports testbench languages for System Verilog, UVM, OVM, and e
  • Runs on all major simulators
  • Generation of constraint-random bus traffic
  • Verify all agent types: Host (eDSPn) or Device (eUSPn)
  • Dynamic activation and reconfigure the VIP attributes anytime during the simulation
  • Built-in verification plan, protocol checks, and coverage model
  • Callback access at multiple TX and RX queue points for Scoreboard and data manipulation

Key Features

The following are the key features from the specifications that are implemented in the VIP:

Feature Name

Description

Supported DUT Types
  • All eUSB2v2-compliant DUT types in host (eDSPn) or device (eUSPn) mode

Transaction Types
  • All types of transfers: bulk, control, interrupt, and isochronous transactions

Enumeration
  • Provides a complete USB protocol hierarchy enumeration process for device models from Host

Operational Speed
  • Operates at high speed (960Mbps to 4.8Gb/s) and support symmetric/asymmetric data rate

Reset Signaling
  • Supports high-speed chirp handshake

Suspend/Resume
  • Supports suspend, resume, remote wake-up, and low-power management (LPM)

Transaction and Packet Checks
  • Checks for all transaction and packet rules including inter-packet gap and propagation delays

Protocol Features
  • Support symmetric/asymmetric mode: All HSx data rate for upstream and downstream supported
  • Support scrambling
  • Support link bring up
  • Support for jitter handling
  • Support for port reset in all states

Translator
  • Digital translator available for sending eUSB2v2-compliant traffic

Register interface
  • Support to change the severity (Error, Warning, Info) of the protocol assertions
  • Support to initiate various commands such as reset, suspend/resume/remote wake-up, disconnect/connect, and so on
  • Support to control the functionality such as end-point buffers, chirp sequence, and clock frequency
  • Support to store information of the VIP model such as, device states, device address, end-point information, and other information that is easily accessible by the testbench
  • Support to insert error injections
  • Support to initiate go to Port Reset from any state, issue silent and soft disconnect by device (eUSPn)

Predefined Error Injections
  • Device drives Port Reset during POR
  • Host drive ED+ as 1 instead of driving SE1 in Port Reset
  • Device corrupts the ACK in Port Configuration
  • Device drives invalid Connect Signal depending on the speed of operation
  • Device drives invalid ping
  • Host does not send an EOP
  • Host drives J signal instead of K during the resume operation
  • Host does not drive Resume signal after Remote wakeup from device
  • Host sends corrupted EOP to the device

Master Your Tools

Tutorials, Documentation, and Local Experts

Cadence Online Support

Increase your efficiency in using Cadence Verification IP with online trainings, VIP Portal, application notes, and troubleshooting articles

Learn More

Related Products

System VIP
Design IP
Xcelium Logic Simulation
Palladium Emulation