Best-in-class NVM Express® Verification IP for your IP, SoC, and system-level testing.
The Cadence Verification IP (VIP) for NVMe is part of Cadence's storage interface VIP portfolio. It provides a mature and highly capable compliance verification solution for the NVM Express (NVMe) protocol. It is applicable for IP, SoC, and system-level verification. The VIP is compatible with the industry-standard Universal Verification Methodology (UVM) and runs on the Cadence Xcelium Logic Simulator as well as on third-party simulators.
The Cadence VIP for NVMe seamlessly integrates with Cadence VIP for PCI Express® for all generations (1.0, 2.0, 3.0, 4.0, 5.0, and 6.0), it supports NVMe over AXI verification and NVMe standalone verification.
Supported specification: NVMe Specification Revisions 2.0, 1.4, and 1.3.
NVMe VIP Host
NVMe VIP Subsystem
Product Highlights
Support testbench language interfaces for SystemVerilog and UVM
Generates constrained-random bus traffic with predefined error injection
Allows verification modes in standalone NVMe, over PCIe or over AXI
Callbacks access at multiple TX and RX queue points for scoreboarding and data manipulation
Provides extensive coverage in SystemVerilog
Packet tracker creation for easy debugging
Key Features
The following table describes key features from the specifications that are implemented in the VIP:
Feature Name
Description
Admin Command Set
Supports all of the mandatory Admin Command set, which defines the commands that can be submitted to the Admin Submission Queue
NVM Command Set
Supports all of the mandatory NVM command set, which is a specification-defined I/O command set used with an I/O queue pair
I/O Queue
Configurable I/O submission/completion queues:
Up to 64K queues
Each queue supports up to 64K outstanding commands
Admin Queue
Configurable Admin submission/completion queues
Controller-Level Reset
CC.EN transitions from "1" to "0"
Subsystem-Level Reset
Supports NVM Subsystem Reset
Command Arbitration
Configurable command arbitration schemes:
Round robin
Weighted round robin
Vendor specific
Interrupt Support
Pin based
MSI (single and multiple message)
MSI-X
Multi-Path I/O
Supports two or more completely independent PCIe paths between a single host and namespace
Namespace Sharing
Supports two more hosts to access a common shared namespace
Namespace Management
Supports the Namespace Management command used to create/delete namespace
Modes
Standalone NVMe mode
NVMe over PCIe
NVMe over AXI
NVMe 1.3
PRP Entry and List
Supports physical region page (PRP) entry that points to physical memory page
Scatter Gather List
Supports scatter gather list (SGL)
Sanitize (optional)
Supports sanitize operation in which all user data in the NVM subsystem is altered such that recovery from any cache or non-volatile media is not possible
Directives (optional)
Supports the directives mechanism that allows the exchange of information between host and NVM subsystem or controller
Boot Partitions
Boot partition support by controller
Telemetry
Device reports telemetry opaque data that is initiated by either the host or controller
Virtualization
Supports virtualization management command
Device Self-Test
Supports device self-test command to start or abort self-test operation
Host-Controlled Thermal Management
Supports thermal management actions
Timestamp
Enables host to set timestamp value in the controller
Emulated Controller Performance Enhancement
Supports doorbell buffer config command
NVMe 1.4
Verify Command
Supports Verify Command implementation
NVMe Set
Supports NVMe Set feature
Endurance Group
Supports Endurance Group feature
NVMe 2.0
Mandatory Admin and I/O commands
Supports Mandatory Admin commands and Mandatory I/O commands
PI Enhancement
Added PI enhancement for enhanced data protection
Key Per I/O
Supports Key Per I/O feature
Zoned Namespaces
Added support to handle Namespaces divided into multiple Zones
