Simulation VIP for MIPI UniPro
Overview
Best-in-class MIPI® UniPro Verification IP for your IP, SoC, and System-Level Design Testing
In production since 2011 on dozens of production designs.
Incorporating the latest protocol updates, the mature and comprehensive Cadence Verification IP (VIP) for the MIPI® UniProsm Protocol provides a complete bus functional model (BFM), integrated automatic protocol checks, coverage model, and compliance tests. Designed for easy integration in testbenches at IP, system-on-chip (SoC), and system levels, the VIP for UniPro helps you reduce time to test, accelerate verification closure, and ensure end-product quality. Our VIP runs on all major simulators and supports SystemVerilog and e verification languages along with associated methodologies, including the Universal Verification Methodology (UVM) and Open Verification Methodology (OVM).
Supported specifications: MIPI UniPro v1.6, v1.8, v2.0, and v3.0 and M-PHY v4.0, v4.1, v5.0, and v6.0.

Product Highlights
Compliance: Contains predefined checks to verify that the DUT agents adhere to the protocol rules
- Error detection: Supports error detection on all layers, more than 200 different protocol checks
Coverage: Monitors, checks, and collects coverage on bus traffic using hundreds of automatic protocol checks, including configuration and runtime checks
Error injection: Random and predefined error injections promote easy testing of scenarios and scenario creations
Environment setup: Configurable environment layers allow for early and specified verification of Data Link Layer
Traffic: Generates UniPro traffic on both transaction classes for host and device. Supports constrained-random bus traffic generation
- Packet tracker creation for easy debugging
Callbacks access at multiple TX and RX queue points for scoreboarding and data manipulation
- Dynamic activation to enable setting the VIP as active/passive during run time
Key Features
The following table describes key features from the specifications that are implemented in the VIP for UniPro:
Feature Name |
Description |
---|---|
Serial and RMMI interfaces |
|
CPORT signal interface |
|
All layers supported |
|
Built-in sequences |
|
Data link layer |
|
Transport layer |
|
Lane capabilities |
|
Connectivity capabilities |
|
PHY testing |
|
Test feature |
|
CDR |
|
PAM4 |
|
HS-G6 with 1b1b Encoding |
|
TFS |
|
Pre-Coding and Gray Coding |
|
TFS Error Handling |
|
Simulation Test Suite
Extensive test suite, coverage model, and verification plan with clear linkage to the specification for simple and fast compliance testing.
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