Improving the predictability, productivity, and quality (PPQ) of verification closure requires management and automation at block, chip, and system levels. Cadence
® technology tracks the progress of an evolving design against its functional, performance, and schedule objectives simultaneously. It automates the deployment of simulation runs, analyzes failures and coverage data, and guides the steps toward closure.
Cadence vManager™ Verification Management, now in it’s fourth generation, is the industry- leading verification management tool, in use at a majority of the top semiconductor companies worldwide. The tool deploys regression runs, sets up analysis views, organizes and debugs errors, and manages results across multiple teams, projects, and geographies. Using the vManager platform, users can improve overall verification throughput across all verification engines, while increasing confidence and design quality.