- Bridges the gap between design and analysis with in-design SI/PI analysis
- Tightly integrates Sigrity analysis engines with the Allegro implementation design canvas
- Provides quick screening of a design for SI problems without the need for any SI models
- What-if topology circuit simulation using the modern Allegro system capture canvas
- Accelerates time to design success while lowering cost of end products
- Provides in-design SI/PI analysis within a constraint-driven flow
Cadence® Sigrity™ Aurora provides traditional signal and power integrity (SI/PI) analysis for pre-, in-design, and post-layout PCB designs. Integrated with Cadence Allegro® PCB editing and routing technologies, Sigrity Aurora users can start analyzing early in the design cycle using “what if” exploration scenarios in order to set more accurate design constraints and reduce design iterations.
Sigrity Aurora reads and writes directly to the Allegro PCB database for fast and accurate integration of design and analysis results. It provides a SPICE-based simulator and the patented Sigrity embedded hybrid field solvers for extraction of 2D and 3D structures. It supports power-aware IBIS (behavioral) models, as well as transistor-level models, if necessary. Parallel bus and serial channel architecture can be explored pre-layout, to compare alternatives, or post-layout, for a comprehensive analysis of all associated signals.
DC PI analysis measures any voltage drop between the source and the sink. The results can be visualized on the design canvas as voltage, voltage drop, or current density. Designers can change the design and quickly see the impact of their changes without ever leaving the Allegro PCB implementation canvas.
- Performs in-design IR drop, crosstalk, and reflection analysis using workflows that guide the user to a successful simulation
- Detects design errors early to reduce design re-spins and increase first-pass success
- Improves product performance through solution-space exploration
- Explores alternative topologies in the earliest stages
- Allows the user to attach to a live Allegro PCB Symphony Team Design session and perform SI/PI analysis without making a copy of the design