Offload the Host CPU for Intensive Vision and AI Apps
Provides an imaging and vision-specific programmable solution that is an ideal complement to the host CPU/GPU for running the imaging and vision functions
Scalable for small and big workloads
Covers the wide range of markets addressing machine learning workloads, from low to very high compute (TOPS) depending on use cases
Programmable and Customizable
Synthesizable processors with the configurability and extensibility that users have come to value from Cadence
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5-way VLIW SIMD machine - 8/16/32 bit fixed-point processing
- Data-level parallelism with SIMD MACs: 8x8, 8x16, 16x16
- Up to 1024 (8x8) MACs
- Half-precision floating-point unit (FP16)
- Single-precision floating-point unit (FP32)
- Double-precision floating-point unit (FP64)
- Complex floating-point support (FP16,FP32, FP64)
- Optional accelerators for SLAM
- User-defined instructions support
- Integrated DMA
- ISO 26262 Compliant: Certified as ASIL-compliant and equipped with both hardware and software safety mechanisms
Extensive Computer Vision Functions
The highly optimized Xtensa® imaging library provides an OpenCV-like interface and support for over 1700 functions on the Vision family of DSPs
Support for the Latest AI Networks
Supporting ONNX and GLOW allows the Vision DSPs to be on the cutting edge of evolving AI development.
Rich Third-Party Application Software Support
Cadence supports a very rich set of third-party applications targeting the Vision DSP family, which are ported and optimized on our DSPs for fast time to market
Comprehensive Framework Support
Migrate existing codebases to the Vision DSPs by using OpenVX, OpenCL, and Halide frameworks
Cadence, through its Tensilica processor IP, brings together best-in-class products and services from industry leaders to help you accelerate the development of your SoC designs while meeting your demanding power and performance requirements. Browse the list of Tensilica processor IP service partners below.
Functional Safety for Automotive
Cadence is committed to enabling Functional Safety applications across the Tensilica processor lineup, whether it's an off-the-shelf processor/DSP IP or a custom domain-specific processor for a specific application
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Tensilica Processor Technology
Differentiate, reduce time to market, add flexibility, and get the best performance, power, and area
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TIE
Customize your DSPs/processors for optimized performance, energy efficiency, and differentiation
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Development Toolchain
Create a perfect match for your application, guaranteed correct by construction
LEARN MORESupport
Cadence is committed to keeping design teams highly productive with a range of support offerings and processes designed to keep users focused on reducing time to market and achieving silicon success.
Free Software Evaluation
Try our SDK Software Development Toolkit for 15 days absolutely free. We want to show you how easy it is to use our Eclipse-based IDE.
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Training
Our hands-on training has been demonstrated to dramatically speed up the understanding of Tensilica tools and best use of the products.
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Online Support
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Xtensa Processor Generator (XPG)
The Xtensa Processor Generator (XPG) is the heart of our technology - the patented cloud-based system that creates your correct-by-construction processor and all associated software, models, etc. (Login Required)
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