The Cadence® 16G Multi-Link and Multi-Protocol PHY is a silicon-proven, high-end SerDes operating at speeds from 1.25Gbps to 16Gbps featuring long-reach equalization capability at very low active and standby power. This SerDes offers ultra-low exit latency for time-critical applications. It simultaneously supports PCI Express® (PCIe®) 4.0, 10G-KR, and QSGMII/SGMII, and other protocols allowing great flexibility to mix and match protocols within the same macro.
Single macro supports max 16Gbps with up to 16 lanes for long-reach applications
Mature and Silicon Proven
Compliance proven, customer SoCs in volume production
Fully validated by Cadence’s rigorous IP qualification process and system stress tests
Ease of Use
Fully verified pre-integrated IP delivery, with package and signal integrity support and firmware for rapid bring-up