Overview

MIPI CSI-2 Transmitter

The Cadence® Transmitter (TX) Controller IP for MIPI® Camera Serial Interface 2 (CSI-2sm) is responsible for handling image sensor data in multiple RGB, YUV, and RAW formats, and user-defined data formats, while converting these into CSI-2-compliant packets for transmission over a D-PHYsm interface via the PPI interface.

The TX Controller IP for CSI-2 can handle up to four independent pixel streams and can perform Virtual Channel and Data Type interleaving before transmission four PPI data lanes.

mipi-csi-2-tx-controller-diagram

MIPI CSI-2 Transmitter Controller Block Diagram

Key Benefits

Full-Featured and Highly Configurable IP Core

Area customized for different applications

Integrates to Cadence or Third-Party MIPI D-PHY 2.1

Wide range of process nodes supported

Automotive Version Available

With safety manual and FMEDA

Features

  • Standards Compliance. CSI-2 v2.1, with 8-bit PPI data width and links with 1, 2, or 4 data lanes

  • Provides up to 4 Independent Stream Output Interfaces, allowing a highly configurable range of options, including multiple pixel modes, various buffering modes, packed data mode, Data Type selection, and Virtual Channel or Data Type interleaving

Modern big RGB image  sensor from digital photo camera established on the standard  copper radiator.