The 112G SerDes delivers exceptional long-reach performance with superior margin, optimized power and area that is ideal for the next-generation cloud networking, artificial intelligence and machine learning (AI/ML), and 5G wireless applications. The SerDes PHY IP supports PAM4 and NRZ signaling and data rates from 1G to 112G and incorporates industry-leading analog-to-digital converter (ADC), clock-data-recovery (CDR), and digital signal process (DSP) technology that enables the support of greater than 40dB channel.

Key Benefits

Production Quality

Large number of customer production tapeouts and SoC proof points

Robust Performance

ADC/DSP-based receiver architecture provides superior data recovery for lossy and noisy channels

Comprehensive Testability

Rich diagnostic toolkit for easy observation and debugging


  • Supports full-duplex 1Gbps to 112Gbps data rates
  • Compliant to IEEE 802.3ck and OIF standard electrical specifications
  • 400G Ethernet PHY + controller subsystem proven in silicon
  • Supports flexible SoC floorplan and IP placement provides package substrate guideline/reference designs
  • Available in multiple advanced-process nodes including 7nm, 6nm, and 5nm.