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Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

PRODUCT CATEGORIES

  • Logic Equivalence Checking
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Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

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System Design and Verification

Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.

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IP

An open IP platform for you to customize your app-driven SoC design.

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IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

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System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

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Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • System Design and Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation
          • Formal and Static Verification
          • FPGA-Based Prototyping
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
          • Protium X1 Enterprise Prototyping Platform
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • PRODUCT CATEGORIES
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • Solutions
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
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Cadence Pattern Analysis

Delivers versatile layout processing with unmatched performance

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Key Benefits

  • High capacity
  • High performance analysis
  • Scales linearly with area
  • Production proven
  • Versatile applications

Cadence® Pattern Analysis provides the most effective layout analysis and optimization solution to maximize manufacturability from cell to full-reticle layout. Based on production-proven pattern analysis technology, Cadence Pattern Analysis combines traditional pattern analysis based on layout clips and the Squish™ technology to deliver 10-100X faster performance and larger capacity than traditional DRC-based solutions. With Cadence Pattern Analysis, design and manufacturing teams can automate design quality improvements and accelerate design finishing prior to manufacturing. 

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Benefits

High performance
  • Up to 10-100X faster than other solutions means minutes vs. hours, hours vs. days
  • Faster deck development with intuitive coding style and high-productivity GUI integrated in QuickView Signoff Data Analysis Environment
Scalable
  • Scales linearly with area
  • Each additional pattern has only a small impact on runtime
  • Scales up to 100,000s of patterns to search and optimize
High capacity
  • From cell to full-reticle capacity
  • Handles millions of optimizations
  • Highly distributable
Production proven
  • In use to screen incoming tapeouts at major foundries
  • Allows urgent foundry production fixes
  • Foundation of pattern database to gather, monitor, and mitigate yield detractors
  • Allows design optimization to improve yield of incoming designs
Versatile applications
  • Single-pass design optimization
    • Single-pass single-deck search and optimization
    • Searches exact and fuzzy patterns
    • Automatically replaces or modifies patterns
    • Pattern deck includes both search and optimization definition
    • Increases recommended rules usage and DFM scoring with automated layout optimization
    • Integrated in Innovus™ Implementation System, Virtuoso® Layout Suite and QuickView Signoff Data Analysis Environment
    • Provides urgent production fixes
    • Saves hours with automated DRC fixing
  • Interactive layout analysis
    • Interactive pattern capture, editing, search, and optimization integrated in QuickView Signoff Data Analysis Environment
    • Allows quick deck development, update, and validation
  • Pattern profiling and classification
    • Automatically and quickly measure layout dimensions to generate histograms and reports on pattern usage
    • Identifies most frequent patterns and outliers
    • Groups similar patterns
    • Generates profiling reports and histograms
  • Yield detractor monitoring
    • Creation and maintenance of pattern database of yield detractors
    • Scores yield detractor patterns and analyzes their complexity
    • Groups similar yield detractors
    • Enables systematic pattern-based dispositioning of yield detractors
  • Pattern generation/enumeration
    • Generates and varies patterns of interest within their context
    • Generates patterns for DRC deck validation
    • Tests key generation for process hotspot coverage
  • Hierarchy injection
    • Creates hierarchical layout from flat layout or flattened layout
    • Recovers hierarchy from layout that has been flattened
    • Accelerates subsequent processing
    • Reduced database size
Cadence Pattern Analysis and Optimization Solution

Contact Us

TRAINING COURSES

Process related yield risk mitigation with in-design pattern replacement for system ICs manufactured at Advanced technology nodes

 

Application to DFM for Fabless: Design-Based Diffing, Pattern Analytics, and Risk Scoring

VIEW PRESENTATION

Pattern-Based Analytics to Estimate and Track Yield Risk of Designs Down to 7nm

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Methodology for Analyzing and Quantifying Design Style Changes and Complexity Using Topological Patterns

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GLOBALFOUNDRIES discusses how they collaborated with Cadence on pattern-matching technologies to accelerate full-chip DFM signoff.

  • Related Products

    • CMP Predictor
    • LDE Electrical Analyzer
    • Litho Physical Analyzer
    • Process Proximity Compensation
News ReleasesVIEW ALL
  • Rockley Photonics Collaborates with Cadence to Create a High-Performance System for Hyperscale Data Centers 12/02/2020

  • Cadence Wins Four 2020 TSMC OIP Partner of the Year Awards 11/02/2020

  • Cadence Pegasus Verification System Certified for TSMC N16, N12 and N7 Process Technologies 10/08/2020

  • GLOBALFOUNDRIES Collaborates with Cadence on Availability of Mixed-Signal OpenAccess PDK for 22FDX Platform to Enable Advanced Mixed-Signal and mmWave Design 09/24/2020

  • Cadence Digital and Custom Flows Achieve Certification for TSMC N3 Process 08/25/2020

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