Comprehensive Design Platform for RF/Microwave ICs and Modules

Cadence Virtuoso Studio RF accelerates the development of silicon and multi-fabric RF/microwave products. This robust platform enables seamless concurrent electrical and physical design entry, coupled with RF analysis and optimization using the Cadence Spectre Simulation engine and virtual communication system testbenches. Develop new Si MMIC IP based on foundry-approved PDKs or incorporate existing Virtuoso RFIC IP into your laminate co-design supported by in-design electromagnetic (EM) and thermal analyses to ensure unmatched efficiency and accuracy for faster, more reliable product development cycles.

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Accelerating Si MMIC and RF/Microwave Multi-Chip Module Co-Design

Streamline Entire RF Design Flow

Unified schematic capture, layout, RF circuit, and system-level simulation, EM/thermal analysis, and optimization within a single, cohesive platform to reduce manual engineering effort

RF Design with Confidence

Maintain consistent simulation and manufacturing database to enable accurate, first-pass success for MMICs and modules in heterogeneous designs

Maximize Productivity for RF Integration

Seamless co-design of Si MMICs, RF laminates, and Virtuoso IP for high-performance 3D heterogeneous integration and multi-fabric modules dramatically reduces engineering time and risk

Foundry-Approved, Industry Trusted

Advanced RF through millimeter-wave system design aligns with evolving industry standards and foundry requirements for scalable, reliable RF design in next-generation aerospace, defense, and communications systems

Accelerate the Development of RF Silicon and Multi-Fabric Systems

RF Analysis

Investigate early design requirements such as device sizing, bias, stabilization, and load/source impedance requirements or simulate system performance metrics for Virtuoso IC designs with communication system testbenches.

Si MMIC Design

Develop silicon MMICs based on Virtuoso Studio RF-enabled Virtuoso PDKs, accurate circuit simulation and optimization with Spectre RF Option, in-design EM analysis with Cadence EMX Planar 3D Solver, and integrated Physical Verification System (PVS) to ensure that layouts adhere to rigorous design rule check (DRC) standards.

RF Module Co-Design

Use the Virtuoso design link to embed Virtuoso IP into your RF laminate co-design to ensure optimum performance across die and package for cases where RF design elements such as impedance matching circuits or filter resonators are designed off-chip.

Passive IC Component Design

Use parametric optimization in Virtuoso Studio RF with arbitrary metalized structures or EMX PCells and process technology (stack up) to create custom passive IC components based on highly accurate EM optimization.

Optimized RF/mW Design Platform

The Virtuoso Studio RF platform integrates concurrent schematic and layout editors with system and circuit simulation, waveform viewing, in-design EM/thermal analysis, and design automation features to support all phases of MMIC and RF module design from initial concept through tapeout. Virtuoso Studio RF addresses the unique requirements of RF product development, connecting physical design to electrical performance with intelligent and powerful parametric optimization ideally suited for MMIC, RF module, and PCB design.

Create Silicon MMICs with Proven Virtuoso/Spectre Accuracy

Virtuoso PDK enablement for Virtuoso Studio RF allows engineers to develop MMIC devices using leading silicon RF processes with foundry-validated simulation models, PCells, and callbacks simulated with the Spectre Simulation Platform to ensure accurate performance predictions. The platform also supports in-design analysis with EMX Planar 3D Solver for parametric optimization of on-chip passives and interconnects with best-in-class EM analysis for silicon ICs.

Deliver Products to Market Faster with Si MMIC Signoff DRC

Virtuoso Studio RF supports Physical Verification System (PVS) integration to offer complete design signoff checks (DRC and LVS) with foundry-provided PVS rule decks, supporting efficient, comprehensive debug tools to reduce debug time, increase productivity, and provide an integrated signoff physical verification solution for Si MMIC designs.

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