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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
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          • Genus Synthesis Solution
          • Conformal Smart LEC
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          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
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          • Circuit Design
          • Circuit Simulation
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          • Layout Verification
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          • RESOURCES
          • Flows
      • System Design and Verification
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          • Debug Analysis
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          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
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          • RESOURCES
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          • Celsius Thermal Solver
          • Sigrity Advanced SI
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Liberate Trio Characterization Suite

Industry’s first complete library characterization system

Read Datasheet
  • Liberate Trio Characterization Suite
  • Characterization
  • Process Variation Modeling
  • Library Validation

Key Benefits

  • Comprehensive library characterization system including variation modeling and library validation for standard cells and complex I/Os
  • Ability to characterize multi-PVT corners in the same run
  • Generate statistical libraries in LVF along with nominal using the unified flow
  • Critical corner prediction using machine learning algorithms
  • Cloud enablement with massive distribution and parallelization algorithms for faster throughput
ASK US A QUESTION

 

The Cadence® Liberate™ Trio Characterization Suite is the industry’s first unified library characterization system that brings together characterization, variation modeling, and library validation for standard cells, custom cells, multi-bits, and I/Os. The Liberate Trio Suite includes multi-PVT and unified flows that achieve both accuracy and high-speed performance. Its powerful combination of patented technology for generating and optimizing characterization stimulus and parallel processing capability takes advantage of enterprise-wide compute resources, and it leverages cloud resources for an enormous collection of libraries. The Liberate Trio suite is your one-stop-shop for all aspects of standard cell library characterization and validation.

Unified Library Characterization System

The Liberate Trio suite combines our tested and proven characterization suite with some of the most advanced technology available today in a unified library characterization system.

Liberate Trio Characterization Suite complete library characterization system

Multi-PVT Flow

The Liberate Trio suite provides a new multi-PVT flow to characterize multiple corners in the same run with the resulting libraries maintaining consistency in structure. Vectors and modeling attributes extracted from standard cell circuit analysis are shared among all corners to reduce runtime and ensure the structural symmetry need for static timing analysis (STA) scaling applications. This simplifies the challenge of dealing with an enormous collection of corners across libraries.

Unified Flow

Statistical libraries in Liberty Variation Format (LVF) and nominal libraries can now be generated using a unified characterization run that shares statistical and nominal SPICE process models. This flow eliminates the need to merge libraries at the end of a statistical run and the combined characterization run improves performance.

Machine Learning

The machine learning algorithms in the Liberate Trio suite enable prediction of critical corners through clustering techniques to determine which corners need to be characterized. The use of machine learning significantly reduces the number of libraries that will need to be characterized while ensuring accuracy using smart interpolation.

Cloud Enablement

Characterization of large libraries that would normally take weeks can now be turned around in days. Thoroughly distributed and massively parallel, our library characterization portfolio has been fully optimized to run on cloud-based servers by making characterization processes. The Liberate Trio suite can be used on leading cloud service providers or a company’s private cloud, and is scalable to over thousands of CPUs. 

Features

  • Utilizes a single script to characterize all PVT corners in a library using multi-PVT flow
  • Statistical and nominal libraries unified in a single characterization run
  • Efficient multiprocessing delivers 3X runtime improvements for library sets
  • Predicts critical corners using machine learning 
  • Runtime metrics and results monitoring with a sleek new GUI cockpit

TRAINING COURSES

GlobalFoundries’ Siddharth Sawant shares insights on the aging mechanisms and best approach to achieve highly accurate aging data models using the Cadence Liberate Characterization Solution.

Hear how the cloud-optimized Liberate Trio Characterization Suite provides characterization, process variation modeling, and validation for improved throughput and productivity.

Advanced Characterization with Cadence Liberate Trio

  • Related Pages

    • Liberate MX Memory Characterization
    • Liberate AMS Mixed-Signal Characterization
Resource Library

Video (10)

  • Advanced Characterization with Cadence Liberate Trio Characterization Suite
  • GlobalFoundries Expert Insights: Aging Analysis for IoT and Automotive Applications
  • Overview of the Characterization Interface in Liberate Trio Characterization Suite
  • Achieve greater throughput and productivity with Liberate Trio Characterization Suite
  • Library Characterization in the Cloud
  • Invecas Provides Electromigration-Based Maximum Capacitance Limits for Standard Cell Library Using Cadence Virtuoso Liberate Characterization Solution
  • Characterizing 22FDX Library at GLOBALFOUNDRIES
  • Faster Timing Characterization of Analog Macros
  • Accurate and Faster SoC Signoff with Simulation-Based AMS Characterization
  • Statistical Characterization Approach Using Liberate MX with 40nm Low Voltage SRAM

Success Story Video (3)

  • Invecas Provides Electromigration-Based Maximum Capacitance Limits for Standard Cell Library Using Cadence Virtuoso Liberate Characterization Solution
  • Characterizing 22FDX Library at GLOBALFOUNDRIES
  • Faster Timing Characterization of Analog Macros

Datasheet (1)

  • Liberate Trio Characterization Suite Datasheet

Press Releases (9)

  • Cadence Collaborates with TSMC to Accelerate 5nm FinFET Innovation, Enabling Next-Generation SoC Production Design
  • Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation
  • Cadence Launches Liberate Trio Characterization Suite Employing Machine Learning and Cloud Optimizations
  • Cadence Collaborates with TSMC to Advance 5nm and 7nm+ Mobile and HPC Design Innovation
  • Cadence Achieves TÜV SÜD’s First Comprehensive “Fit for Purpose - TCL1” Certification in Support of Automotive ISO 26262 Standard
  • Cadence Tools and Flows Achieve Production-Ready Certification for TSMC’s 12FFC Process
  • Cadence Custom/Analog and Full-Flow Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 7LP Process Node
  • Cadence and TSMC Advance 7nm FinFET Designs for Mobile and HPC Platforms
  • Cadence Design Tools Certified for TSMC 7nm Design Starts and 10nm Production

White Paper (2)

  • Compressing Datasets Created During Silicon Design White Paper
  • Addressing Process Variation and Reducing Timing Pessimism at 16nm and Below White Paper

Presentation (1)

  • Quantus Extraction Solution for Accurate and Fast Silicon Signoff and Verification
VIEW ALL
Videos

Overview of the Characterization Interface in Liberate Trio Characterization Suite

Achieve greater throughput and productivity with Liberate Trio Characterization Suite

GlobalFoundries Expert Insights: Aging Analysis for IoT and Automotive Applications

Cadence Cloud for Characterization

Liberate MX Product Demonstration

Characterizing 22FDX Library at GLOBALFOUNDRIES

Faster Timing Characterization of Analog Macros

Statistical Characterization Approach Using Liberate MX with 40nm Low Voltage SRAM

Advanced Characterization with Cadence Liberate Trio Characterization Suite

News ReleasesVIEW ALL
  • Cadence Collaborates with TSMC to Accelerate 5nm FinFET Innovation, Enabling Next-Generation SoC Production Design 04/22/2019

  • Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation 10/01/2018

  • Cadence Launches Liberate Trio Characterization Suite Employing Machine Learning and Cloud Optimizations 06/25/2018

  • Cadence Collaborates with TSMC to Advance 5nm and 7nm+ Mobile and HPC Design Innovation 05/01/2018

  • Cadence Achieves TÜV SÜD’s First Comprehensive “Fit for Purpose - TCL1” Certification in Support of Automotive ISO 26262 Standard 10/11/2017

Blogs VIEW ALL

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