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  • Products

    • Products

      Cadence.AI

      • Millennium Platform

        AI-driven digital twin supercomputer

      • Cadence Cerebrus AI Studio

        Multi-block, multi-user SoC design platform

      • Optimality Intelligent System Explorer

        AI-driven Multiphysics analysis

      • Verisium Verification Platform

        AI-driven verification platform

      • Allegro X AI

        AI-driven PCB Design

      • Tensilica AI Platform

        On-device AI IP

    • Products

      IC Design & Verification

      • Virtuoso Studio

        Analog and custom IC design

      • Spectre Simulation

        Analog and mixed-signal SoC verification

      • Innovus+ Platform

        Synthesis and implementation for advanced nodes

      • Xcelium Logic Simulation

        IP and SoC design verification

      • Silicon Solutions

        Protocol IP and Compute IP, including Tensilica IP

      • Palladium and Protium

        Emulation and prototyping platforms

    • Products

      System Design & Analysis

      • Allegro X Design Platform

        System and PCB design platform

      • Allegro X Adv Package Designer Platform

        IC packaging design and analysis platform

      • Sigrity X Platform

        Signal and power integrity analysis platform

      • AWR Design Environment Platform

        RF and microwave development platform

      • Cadence Reality Digital Twin Platform

        Data center design and management platform

      • Fidelity CFD Platform

        Computational fluid dynamics platform

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    • 3D-IC Design

    • Advanced Node

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    • Cloud Solutions

    • Computational Fluid Dynamics

    • Functional Safety

    • Low Power

    • Mixed-signal

    • Molecular Simulation

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Library Characterization Flow

Complete and robust solutions for characterizing and validating your foundation IP

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Key Benefits

  • Library characterization flow centered on Virtuoso Characterization Suite
  • Industry's most complete and robust solutions for IP characterization and validation
  • InsideView technology delivers better correlation to your silicon
  • Integrates with Spectre Circuit Simulator for greater throughput and accuracy

Designing at nanometer process technologies—and especially at advanced nodes (28nm and below)—requires many additional library views in order to achieve high-quality silicon and avoid silicon re-spins due to inaccurate signoff analysis. To manage leakage power, it is common to have cells with low-, typical-, and high-threshold voltages (SVT, LVT, HVT, etc.), each with different power and performance characteristics.

For accurate modeling of instance-specific voltage variation or temperature gradients, it’s vital to characterize each library at multiple voltages and multiple temperatures, increasing the total number of library corners. For the most advanced processes, it is becoming common to offer alternative cell libraries that improve yield at the expense of area and performance. As a result, creating and maintaining all of these library views is becoming a major bottleneck in the design flow.

Cadence provides a library characterization flow centered on the Cadence® Virtuoso® Characterization Suite. The suite delivers the industry’s most complete and robust solutions for the characterization and validation of your foundation intellectual property (IP)—from standard cells, I/Os, and complex multi-bit cells to memories and mixed-signal blocks. Cadence’s patented Inside View technology delivers better correlation to silicon by improving library throughput and ensuring timing, power, noise, and statistical coverage of your IP.  The Virtuoso Characterization Suite also integrates with the Cadence Spectre® Circuit Simulator, the industry-standard SPICE simulator, delivering even greater throughput with the accuracy required for advanced-node libraries.

  • Read article on “Library "Safe Margins"—Are They Really Saving Your Design?”

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TRAINING COURSES

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News ReleasesVIEW ALL
  • Cadence Integrity 3D-IC Platform Supports TSMC 3DFabric™ Technologies for Advanced Multi-Chiplet Designs 10/26/2021

  • Cadence and Samsung Accelerate 3nm Mixed-Signal Silicon 09/08/2021

  • Cadence Introduces the Spectre FX FastSPICE Simulator Delivering up to 3X Performance Gains with Superior Accuracy 05/20/2021

  • JVCKENWOOD Deploys Cadence Spectre FX Simulator and Comprehensive Design Flows to Improve Productivity 05/20/2021

  • Rockley Photonics Collaborates with Cadence to Create a High-Performance System for Hyperscale Data Centers 12/02/2020

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