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Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

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Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

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Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • System Design and Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation
          • Formal and Static Verification
          • FPGA-Based Prototyping
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Z1 Enterprise Emulation Platform
          • Protium X1 Enterprise Prototyping Platform
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • PRODUCT CATEGORIES
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
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        • Cloud Solutions
        • Low Power
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        • RF / Microwave
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        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
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Spectre eXtensive Partitioning Simulator (XPS)

Unique FastSPICE algorithm delivers up to 10X faster simulation throughput

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Key Benefits

  • High performance and capacity pre- and post-layout simulation for design and IP characterization at the block and full-chip level, delivering a significant reduction in simulation run time compared to a traditional FastSPICE simulator
  • Fully compatible with Spectre simulation platform using a unified simulation front-end
  • Comprehensive set of transistor-level static and dynamic circuit checks to identify issues early in the design flow
  • Predictable accuracy and runtime tradeoff with speed option to accommodate different needs
  • Seamless integration of design and verification in the Virtuoso ADE Product Suite

The Cadence® Spectre® eXtensive Partitioning Simulator (XPS) is a cloud-ready, high-performance transistor-level FastSPICE circuit simulator for pre- and post-layout verification of memories, custom digital, and analog/mixed-signal SoC designs. It delivers the capacity, accuracy, and speed required for verification of modern complex and tightly coupled designs. It uses advanced partitioning techniques to deliver unparalleled performance compared to traditional FastSPICE simulators delivering the needed throughput for design and verification of complex designs.

Reduce Memory Simulation Time from Weeks to Days

Traditional FastSPICE technologies are no longer effective in meeting the verification challenges found at advanced nodes. Spectre XPS complements traditional transistor-level simulation, providing capabilities that address increasing parasitics, low-power circuit structures, variation, and other advanced-node challenges. 

With its unique partitioning technology and new FastSPICE algorithm, Spectre XPS supports:

  • Higher capacity and up to 10X faster simulation throughput 
  • Accurate timing and power analysis for advanced-node, low-power embedded memory applications
  • Shortened simulation time from weeks to just days

Enhanced Accuracy and Performance for Mixed-Signal Design

The increased complexity and functionality of many mixed-signal designs, such as phase-locked loops (PLL), analog-to-digital converters (ADC), logic, and power management, require new simulation solutions that provide a tradeoff between accuracy and performance. The Spectre XPS mixed-signal capabilities meet this challenge with its unique technologies. After the netlist is read in, the mixed-signal design is partitioned to analog and digital components by Spectre XPS, using either its own technology or a user-controlled option. The analog components are automatically run with Spectre APS, and the digital components with Spectre XPS. The approach ensures analog accuracy and digital performance.

 

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TRAINING COURSES

Learn how Cadence Spectre XPS helped ams AG boost simulation speed by 10X.

  • Related Products

    • Spectre Simulation Platform
    • Spectre RF Option
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Videos

Spectre XPS Full Solution for Advanced-node SRAM

Cadence Spectre XPS FastSPICE Simulator for 10X Faster Throughput

Faster Mixed-Signal Simulation Ensures Chip Performance

Spectre XPS Demonstration

ARM and Cadence Partner to Facilitate Mixed-Signal Designs

News ReleasesVIEW ALL
  • Cadence to Acquire AWR Corporation from National Instruments to Accelerate System Innovation for 5G RF Communications 12/02/2019

  • Cadence and National Instruments Enter into Strategic Alliance Agreement to Enhance Electronic System Innovation 12/02/2019

  • Cadence Digital and Signoff Full Flow and Custom/Analog Tools Certified for TSMC N6 and N5/N5P Process Technologies 09/25/2019

  • Cadence Introduces the Spectre X Simulator, a Massively Parallel Circuit Simulator Delivering Up to 10X Faster Simulation with the Same Golden Accuracy 06/03/2019

  • Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation 10/01/2018

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Customers

This complete Cadence solution enables increased throughput and quality, while maintaining the level of SPICE accurate results where required.

Suravi Bhowmik, Senior Manager, TI India Bangalore

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