Overview
Maximize Analog Design Yield
The Cadence Virtuoso Variation Option extends the statistical variation and optimization capabilities of Cadence’s Virtuoso ADE Assembler and Verifier tools to allow for more sophisticated design centering and statistical analyses to be performed on any design to enhance overall design robustness and yield, even with advanced-node technology.
Key Benefits
Sophisticated Design Centering and Statistical Analyses for Maximizing Analog Yield
Easy to Use
Choose your statistical or optimization task, specify your target, and press a button
Find Statistical Outliers Quickly
Analyze long tails 4-, 5-, or 6-sigma level fast
Detect Most Influential Devices
Use mismatch and statistical sensitivity analyses on critical devices
Move Easily Between Corners and Statistics
One-step creation of worst-case corners from statistical data saves time
Center New Designs to Specifications
Extensive AI algorithms solve difficult design centering problems
Features
You can use a variety of statistical and optimization methods for most design centering challenges and yield problems common with advanced-node designs.
Training and Support
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Training
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Online Support
The Cadence Online Support (COS) system fields our entire library of accessible materials for self-study and step-by-step instruction.
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Technical Forums
Find community on the technical forums to discuss and elaborate on your design ideas.
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