Ensure First-Pass MMIC Design Success

Monolithic microwave integrated circuits (MMICs) based on III-V semiconductors such as gallium arsenide (GaAs) and gallium nitride (GaN) offer superior RF performance for mobile devices, communications infrastructure, and aerospace applications. Cadence RF design and analysis products offer a leading front-to-back MMIC design solution with an innovative user interface and complete integration of design entry, simulation, and physical design tools to achieve optimal performance through reliable circuit simulation, electromagnetic (EM) verification, communication testbenches for faster turnaround times and first-pass success.

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RF Design Platform Accelerates MMIC Product Development and Integration

The Cadence AWR Design Environment platform integrates design entry with RF circuit/system simulation, EM/thermal analyses, optimization, yield analysis, and DRC/LVS support to address all phases of MMIC development from early concept through tapeout.

Meet Your Challenging Design Goals

Minimize MMIC size while optimizing performance with RF-aware layout and dynamically linked electrical/physical design entry

Improve Design Efficiency

Develop advanced products with less engineering effort using comprehensive RF measurement-based simulations with a rigorous harmonic balance (HB) engine for nonlinear analysis and circuit/system/EM co-simulation

Maximize Engineering Productivity

Eliminate manual engineering effort and time-consuming data import/export with design automation, in-design analysis, and powerful scripting for tool and workflow customization

Tape Out with Confidence

Ensure greater design confidence and avoid costly design re-spins with GaAs/GaN foundry-approved PDKs, communication testbenches, and electrical rule checking (ERC), DRC, and LVS for production-ready GDSII export

Implement Advanced System Integration

Understand the performance impact of advanced packaging with fully integrated 3D EM and thermal simulator for bumps, bond wires/ribbons, and laminate parasitic analysis

Accelerate RF/Microwave IP Implemented in III-V Semiconductor Technologies

To meet the high-performance and reduced footprint requirements for multi-mode/multi-band handsets, wireless smart devices, and aerospace systems, companies are differentiating themselves by developing best-in-class RF/microwave IP. III-V compound semiconductor-based MMICs offer excellent high-frequency performance but require the specialized design and simulation capabilities provided in the AWR Design Environment Platform.

Design Entry and Management

MMICs integrate active devices within a network of on-chip passive components to provide the functionality necessary for desired performance. Electrical behavior is directly linked to the physical attributes of individual on-chip components and the overall chip layout. A comprehensive MMIC design flow from Cadence provides parametric, process-specific on-chip component models and layout PCells to support accurate simulation and a layout that complies with foundry manufacturing rules.

Specialized RF Simulation

RF/microwave electronics rely on specialized measurements such as noise figure (NF) and S-parameters and the nonlinear power, gain compression, and efficiency response to large-signal stimuli. RF simulation uses frequency-domain HB analysis to analyze nonlinear networks, including power amplifiers (PAs) and frequency converters (mixers). With digital modulation for communications systems, designers may also need to analyze MMICs with circuit envelope techniques to simulate metrics such as adjacent-channel power ratio (ACPR) and error-vector magnitude (EVM).

Model Support from Leading Foundries

GaAs, GaN, and silicon germanium (SiGe) semiconductors continue to evolve in support of MMICs operating at higher millimeter-wave (mmWave) frequencies for communications and radar applications, while also offering improved performance across all frequencies. Cadence works closely with leading III-V semiconductor foundries and load-pull test system manufacturers to offer process design kits (PDKS) and ensure the latest devices offer robust, simulation-ready models for design.

Design Verification

EM analysis provides full-wave S-parameter extraction that captures potentially harmful signal coupling and resonances that can negatively impact RF performance. With in-design EM/circuit co-simulation between Cadence Microwave Office software and Cadence EM analysis tools such as Clarity 3D Solver, RF engineers can perform accurate design verification before tapeout. Microwave Office software also supports hierarchical EM/circuit co-simulation to support EM analysis across chip, package, and board to provide performance results of the complete integrated system.