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Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

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Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

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Multiphysics System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

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PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

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  • China - 简体中文
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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
          • RESOURCES
          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • Allegro X Design Platform
          • RESOURCES
          • What's New in Allegro
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
      • Computational Fluid Dynamics
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • Solutions
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        • Advanced Node
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        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • Hyperscale Computing
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • AI / Machine Learning
        • Arm-Based Solutions
        • Cloud Solutions
        • Computational Fluid Dynamics
        • Functional Safety
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
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ISO 26262 TCL Compliance

Automotive functional safety kits available for download

Automotive Electronics Overview
  • Automotive Solution
  • Advanced Driver Assistance System
  • Automotive Ethernet
  • Infotainment
  • Electronic Control Unit
  • Functional Safety
  • ISO 26262 TCL Compliance

Cadence is the first EDA supplier to achieve comprehensive “Fit for Purpose - Tool Confidence Level 1 (TCL1)” certification enabling automotive semiconductor manufacturers, OEMs and component suppliers to meet stringent ISO 26262 automotive safety requirements. Cadence® tool and flow documentation was evaluated by TÜV SÜD, an internationally accredited independent testing and conformity assessment company, and deemed to be fit for use with ASIL A through ASIL D automotive design projects.

Cadence offers automotive Functional Safety Documentation Kits covering the full spectrum of semiconductor design and verification. The kits satisfy documentation requirements that the automotive component supplier must provide for their tools and flow to achieve ASIL certification. Additionally, the kits reduce the effort required to evaluate tool use cases within each of the supplier’s automotive design projects and help automotive component suppliers avoid the costly efforts of tool-qualification activities.

The automotive Functional Safety Documentation Kits are available through Cadence Online Support and are freely available to all Cadence registered users. Each kit consists of three major components:

  • Safety manual for the specific flow
  • Tool Confidence Analysis (TCA) documents for each tool in the tool chain
  • Compliance report from TÜV SÜD

While the user still has the responsibility to provide assessment documents for each tool in the flow, there is now a defined structure and methodology to do so. The Cadence approach automatically accommodates new tool versions or even new tools in the flow. Cadence will provide updates to the kits as needed, but effectively, the completion of the TÜV SÜD evaluation applies to current and future versions of the Cadence tools and flows.

The Cadence flow documentation that has achieved automotive “Fit for Purpose - TCL1” certification from TÜV SÜD is as follows:

Analog/mixed-signal design, implementation and verification flow: This flow brings transistor-level designs from creation and simulation through physical implementation and verification using the Cadence Virtuoso® ADE Product Suite and the Spectre® Circuit Simulation Platform. The Cadence Virtuoso ADE Verifier provides design engineers with an integrated means to validate the safety specifications against individual circuit specifications for design confidence.

Digital implementation and signoff flow: This flow covers RTL-to-GDSII implementation and signoff. The Cadence Liberate™ Characterization Solution is new to this flow and is incorporated with the 13 other pre-existing tools including the Cadence Innovus™ Implementation System, Genus™ Synthesis Solution, Modus DFT Software Solution, Tempus™ Timing Signoff Solution, Quantus™ Extraction Solution and Voltus™ IC Power Integrity Solution for the implementation and signoff of automotive designs.

PCB design and verification flow: The PCB design flow includes everything from design authoring to simulation to physical realization and verification using the Cadence OrCAD®, PSpice® and Allegro® product suites. The high-performance design entry, simulation and layout editing tools included with these suites provide an integrated environment for design engineers to validate the safety specifications against individual circuit specifications for design confidence.

Additionally, the following flow has been evaluated and confirmed to be compliant with the ISO 26262 standard for automotive safety:

Digital front-end design and verification flow: The flow documentation kit covers specification to RTL design to verification. The front-end digital tools include the Cadence Genus Synthesis Solution and Conformal® Equivalence Checker. Functional and safety verification capabilities are provided by the Cadence Verification Suite, which includes the Cadence JasperGold® Formal Verification Platform, Xcelium™ Parallel Logic Simulator (to be added to the flow documentation in Q4 2017), Palladium® Z1 Enterprise Emulation Platform, Protium™ FPGA-Based Prototyping Platform, vManager™ Metric-Driven Signoff Platform and the Indago™ Debug Platform (to be added to the flow documentation in Q4 2017). 

  • Digital Design and Verification Tools

    • SimVision Debug
    • vManager Verification Management
    • Jasper RTL Apps
    • Palladium Z1 Enterprise Emulation Platform
    • Protium FPGA-Based Prototyping Platform
    • Conformal Overview
    • Genus Synthesis Solution
  • Analog Design, Verification, and Implementation Tools

    • Quantus Extraction Solution
    • SimVision Debug
    • Spectre Accelerated Parallel Simulator
    • Spectre eXtensive Partitioning Simulator (XPS)
    • Spectre RF Option
    • Virtuoso ADE Product Suite
    • Virtuoso ADE Verifier
    • Virtuoso Schematic Editor
    • Spectre AMS Designer
  • Digital Implementation and Signoff

    • Stratus High-Level Synthesis
    • Genus Synthesis Solution
    • Cadence Modus DFT Software Solution
    • Innovus Implementation System
    • Physical Verification System
    • Conformal Equivalence Checker
    • Joules RTL Power Solution
    • Quantus Extraction Solution
    • Tempus Timing Signoff Solution
    • Voltus IC Power Integrity Solution
    • Voltus-Fi Custom Power Integrity Solution
    • Pegasus Layout Pattern Analyzer
    • Pegasus CMP Predictor
    • Liberate Characterization Solution
  • PCB Design and Verification

    • Allegro Design Entry Capture/Capture CIS
    • Allegro Design Authoring
    • Allegro PCB Designer
    • Allegro PSpice System Designer

Hans Adlkofer, Vice President and Head of Automotive Systems Group, at Infineon Technologies AG explains how Infineon leverages Cadence products for Automotive Chip design to enable smart and safe mixed-signal devices.

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News ReleasesVIEW ALL
  • Cadence Introduces Comprehensive Safety Solution for Faster Certification of Automotive and Industrial Designs 10/19/2021

  • Cadence Accelerates Intelligent SoC Development with Comprehensive On-Device Tensilica AI Platform 09/13/2021

  • Cadence Tensilica Xtensa Processors Address Most Stringent Automotive Functional Safety Requirements with Full ISO 26262 Compliance to ASIL-D 07/28/2021

  • Cadence Tensilica Product Development Process and Software Products Certified for ISO 26262 ASIL D Compliance for Automotive Applications 02/28/2019

  • Cadence Automotive Solution for Safety Verification Used by ROHM to Achieve ISO 26262 ASIL D Certification 07/12/2018

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