Automotive SoC Design

Cadence has worked closely with all the leading automotive semiconductor suppliers for over a decade, and today, the collaboration continues to refine and improve our industry-leading mixed-signal solutions for automotive SoC design. Benefiting from the on-going evolution of the underlying Cadence^® Virtuoso^®, Innovus^™, Spectre^®, and Xcelium^® platforms, the Cadence mixed-signal solution provides unique and powerful integration of analog and digital platforms for advanced-node mixed-signal SoC design. Learn more

An automotive SoC must be reliable across its useful lifetime regardless of the operating conditions or environment. This requirement creates several design challenges. The first challenge is to ensure that testing results in only good parts making it into automobiles. Another challenge is to ensure that even devices operating at high power in extreme environments, such as the engine compartment, never exceed the safe operating region. The final challenge is to reduce the effect of device aging and to extend the lifetime of circuits for vehicles with a typical 15-year lifetime.

Responding to these challenges, the Cadence Legato^™ Reliability Solution is the first to help analog designers design for automotive reliability requirements. It provides the tools to manage design reliability throughout the product lifecycle and includes new technology for:

• Analog Defect Analysis: Analyze the manufacturing test’s ability to identify and eliminate test escapes through analog defect simulation
• Electro-Thermal Analysis: Simulates the effect of temperature on circuit electrical performance using dynamic electro-thermal simulation to prevent thermal overstress and prevent premature failures
• Advanced Aging Analysis: Simulate changes in devices over time, including the effects of temperature and process variation on device aging, to better predict product wear-out

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Advanced-node processes challenge automotive designers with the complex interdependency of manufacturing and variability, on top of increasing power and performance specifications.

Leverage complete, consistent, and converging flows across Innovus^™ digital and Virtuoso^® custom implementation technologies to address design-for-manufacturing (DFM) and variability effects earlier.

Cadence advanced-node platforms enable automotive designers to account for issues such as layout-dependent effects, FinFETs, local interconnect, multi-patterning lithography, and increased device variation and mismatch.

• Automotive mixed-signal SoC design can be centered and optimized for reliability, performance, power, area, and thermal profiles
• Automotive mixed-signal SoC verification can be configured across a range of supported languages, abstractions, methodologies, and Cadence simulation engines, and optimally re-configured as SoC block design progresses to integration
• Provides metric-driven, coverage-based mixed-signal SoC verification and traceability for the IS0 26262 standard
• OpenAccess-based analog and digital implementation, exchange, and signoff