Developing hardware and software systems now involves integrating many IP blocks, many cores, and lots of software. To ensure that your system on chip (SoC) meets your design intent, verification technology is essential. Cadence offers verification solutions—from early software bring-up to use-case testing, debugging, and performance analysis—ideal for Arm-based SoC designs.
Collaborating with Arm, Cadence has enhanced the Arm-based system verification technologies in our System Development Suite to deliver:
- Faster performance analysis and verification of Arm CoreLink interconnect intellectual property- (IP-) based systems. This is made possible through a new adaptable interconnect performance characterization test suite in the Cadence® Interconnect Workbench, along with Arm AMBA® Designer integration.
- More pre-verified support of hardware-accurate OS embedded software verification using the Cadence Palladium® emulation series with Armv8 64-bit Cortex® processor family Fast Models
- Verification IP (VIP) supporting AMBA 5 CHI protocol for advanced server, storage, and networking systems and Accelerated Verification IP for the Palladium series
- Low-power optimization for Arm-based system using dynamic power analysis in the Palladium Z1 platform and also with the Joules RTL Power Solution
- Software-driven verification for Arm-based systems for complex system-level, coverage-driven test development, via Perspec System Verifier and an Arm coherency library
- Hardware/software debug synchronized between embedded software debug on Arm RTL CPUs using Indago Debug Platform and ESWD cycle synchronized debug, as well as Arm DS connected to virtual platforms in Cadence VSP, as well as via JTAG with the Palladium Enterprise Verification and the Protium Enterprise Prototyping Platforms
- Expanded Support for AMBA Protocol and Arm Fast Models
- Expanded CoreLink Performance Verification and Analysis
