Home
  • Products
  • Solutions
  • Support
  • Company
  • EN US
    • SELECT YOUR COUNTRY OR REGION

    • China - 简体中文
    • Japan - 日本語
    • Korea - 한국어
    • Taiwan - 繁體中文

DESIGN EXCELLENCE

  • Digital Design and Signoff
  • Custom IC
  • Verification
  • IP
  • IC Package

SYSTEM INNOVATION

  • System Analysis
  • Embedded Software
  • PCB Design

PERVASIVE INTELLIGENCE

  • AI / Machine Learning
  • AI IP Portfolio

CADENCE CLOUD

VIEW ALL PRODUCTS

Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

PRODUCT CATEGORIES

  • Logic Equivalence Checking
  • SoC Implementation and Floorplanning
  • Functional ECO
  • Low-Power Validation
  • Synthesis
  • Power Analysis
  • Constraints and CDC Signoff
  • Silicon Signoff and Verification
  • Library Characterization
  • Test

FEATURED PRODUCTS

  • Genus Synthesis Solution
  • Conformal Smart LEC
  • Innovus Implementation System
  • Tempus Timing Signoff Solution
  • Pegasus Verification System
  • RESOURCES
  • Flows

Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

PRODUCT CATEGORIES

  • Circuit Design
  • Circuit Simulation
  • Layout Design
  • Layout Verification
  • Library Characterization
  • RF / Microwave Solutions

FEATURED PRODUCTS

  • Spectre X Simulator
  • Virtuoso RF Solution
  • Virtuoso Layout Suite
  • Virtuoso ADE Product Suite
  • Virtuoso Advanced Node
  • Voltus IC Power Integrity Solution
  • RESOURCES
  • Flows

Verification

Offering a full verification flow to our customers and partners that delivers the highest verification throughput in the industry

PRODUCT CATEGORIES

  • Debug Analysis
  • Emulation and Prototyping
  • Formal and Static Verification
  • Planning and Management
  • Simulation
  • Software-Driven Verification
  • Verification IP
  • System-Level Verification IP

FEATURED PRODUCTS

  • vManager Verification Management
  • JasperGold Formal Verification Platform
  • Xcelium Logic Simulation
  • Palladium Enterprise Emulation
  • Protium Enterprise Prototyping
  • System VIP
  • RESOURCES
  • Flows

IP

An open IP platform for you to customize your app-driven SoC design.

PRODUCT CATEGORIES

  • Interface IP
  • Denali Memory IP
  • Tensilica Processor IP
  • Analog IP
  • System / Peripherals IP
  • Verification IP

IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

PRODUCT CATEGORIES

  • Cross-Platform Co-Design and Analysis
  • IC Package Design
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • Flows

System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

PRODUCT CATEGORIES

  • Computational Fluid Dynamics
  • Electromagnetic Solutions
  • RF / Microwave Design
  • Signal and Power Integrity
  • Thermal Solutions

FEATURED PRODUCTS

  • Clarity 3D Solver
  • Clarity 3D Transient Solver
  • Celsius Thermal Solver
  • Omnis
  • Sigrity Advanced SI
  • Sigrity Advanced PI
  • RESOURCES
  • System Analysis Resources Hub
  • AWR Free Trial

Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

PRODUCT CATEGORIES

  • Design Authoring
  • PCB Layout
  • Library and Design Data Management
  • Analog/Mixed-Signal Simulation
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • RF / Microwave Design
  • Augmented Reality Lab Tools

FEATURED PRODUCTS

  • Allegro Package Designer Plus
  • Allegro PCB Designer
  • RESOURCES
  • What's New in Allegro
  • What's New in Sigrity
  • Advanced PCB Design & Analysis Resources Hub
  • Flows

AI / Machine Learning

AI IP Portfolio

Industries

  • 5G Systems and Subsystems
  • Aerospace and Defense
  • Automotive
  • AI / Machine Learning

Technologies

  • 3D-IC Design
  • Advanced Node
  • Arm-Based Solutions
  • Cloud Solutions
  • Low Power
  • Mixed Signal
  • Photonics
  • RF / Microwave
See how our customers create innovative products with Cadence

Support

  • Support Process
  • Online Support
  • Software Downloads
  • Computing Platform Support
  • Customer Support Contacts
  • Technical Forums

Training

  • Custom IC / Analog / RF Design
  • Languages and Methodologies
  • Digital Design and Signoff
  • IC Package
  • PCB Design
  • System Design and Verification
  • Tensilica Processor IP
Stay up to date with the latest software 24/7 - Cadence Online Support Visit Now

Corporate

  • About Us
  • Designed with Cadence
  • Investor Relations
  • Leadership Team
  • Computational Software
  • Alliances
  • Corporate Social Responsibility
  • Cadence Academic Network

Media Center

  • Events
  • Newsroom
  • Blogs

Culture and Careers

  • Culture and Diversity
  • Careers
Learn how Intelligent System Design™ powers future technologies Browse Cadence’s latest on-demand sessions and upcoming events. Explore More
US - English
  • China - 简体中文
  • Japan - 日本語
  • Korea - 한국어
  • Taiwan - 繁體中文
  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation and Prototyping
          • Formal and Static Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Omnis
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
    • VIEW ALL PRODUCTS
  • Solutions
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • Industries
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • Technologies
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
  • Support
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • Support
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • Training
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
  • Company
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers
      • Corporate
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • Media Center
        • Events
        • Newsroom
        • Blogs
      • Culture and Careers
        • Culture and Diversity
        • Careers

Custom/Analog Advanced Node

Innovative capabilities for custom/analog designs at 20nm and below 

  • Advanced-Node Solutions
  • Custom/Analog Advanced Node
  • Digital Advanced Node

Key Benefits

  • Increases quality of silicon: Re-engineered from the ground up to support the most aggressive advanced-node processes 
  • Boosts productivity: New design methodologies along with the introduction of targeted automation techniques greatly enhance productivity of both circuit designers and layout engineers. Leveraging these flows and technologies can increase your productivity by up to 5X versus traditional design tools and flows.
  • Accurately predicts and manages variability: Close collaboration with leading foundries provides capabilities within the Virtuoso® advanced-node platform that enable you to predict and manage variability up front in the design flow and avoid costly design respins due to process variability
  • Industry leader in advanced-node custom design: The Virtuoso advanced-node platform supports and is certified by all major advanced 20/16/14/10/7nm technologies

Innovative capabilities for custom/analog designs at 20nm and below

It's well documented that designing at advanced-process nodes is extremely complicated and painfully expensive. With this in mind, system-on-chip (SoC) solutions must have the right mix of features, functionality, and performance to justify designing at these nodes. But of most concern to custom/analog designers are the challenges that arise from the complexity of manufacturing. The Cadence® Virtuoso advanced-node platform has an innovative set of capabilities that enables designers to take full advantage of the silicon at these process nodes.

Density gradient effect avoidance

Designing at 20nm, 16nm, 10nm, 7nm Advanced Process Nodes

What makes designing at 20nm/16nm/14nm/10nm/7nm advanced nodes unique is the deep, complex interdependency of manufacturing and variability, on top of increasing power and performance specifications. 

Concerns include:

  • Multiple-patterning technology (MPT) and color-aware physical design, including double, triple, quadruple, and penta-patterning
  • Layout-dependent effects (LDE) and density-gradient effects (DGE), in which the layout context—what is placed near to a device—can impact device performance by as much as 30%
  • Sophisticated color-aware custom routing
  • Exponentially increasing physical design rules
  • Device variation and sensitivity
  • New transistors types (e.g., FinFETs)
EM violation avoidance

Virtuoso Advanced-Node Platform

The Virtuoso advanced-node platform improves individual point tools to handle these challenges, as well as enables new design methodologies that allow for rapid layout prototyping, in-design signoff, and close collaboration between schematic and layout designers—essential to designing efficiently at advanced-process nodes. 

The latest release of the Virtuoso advanced-node platform includes:

  • Robust support for FinFET-based designs, requiring MPT to manage device variability and sensitivity on the circuit design
  • Many enhanced interactive and automated capabilities to support a structured layout methodology with features such as core editing commands, interactive wire editor, module generators (ModGens), fully automated custom routing, and assisted placement, all design rules checking (DRC) and coloring correct
  • Unique and close integration with the Virtuoso physical verification system (PVS), enabling signoff verification support for both DRC and coloring decomposition within the Virtuoso Layout Suite
Multiple-patterning support and color-aware physical design
In-design design rule checking
  • Related Products

    • Virtuoso Layout Suite EAD
    • Virtuoso Space-Based Router
    • Liberate Characterization Solution
    • Spectre X Simulator
    • Liberate Variety Statistical Characterization
    • Virtuoso Variation Option
Resource Library

Press Releases (16)

  • Cadence Wins Four 2020 TSMC OIP Partner of the Year Awards
  • Cadence Digital and Custom Flows Achieve Certification for TSMC N3 Process
  • Cadence Achieves Digital and Custom/Analog EDA Flow Certification for TSMC N6 and N5 Process Technologies
  • Cadence and National Instruments Enter into Strategic Alliance Agreement to Enhance Electronic System Innovation
  • Cadence Presented with Four 2019 TSMC Partner of the Year Awards
  • Cadence Digital and Signoff Full Flow and Custom/Analog Tools Certified for TSMC N6 and N5/N5P Process Technologies
  • Cadence Collaborates with TSMC to Accelerate 5nm FinFET Innovation, Enabling Next-Generation SoC Production Design
  • Cadence Recognized with Four 2018 TSMC Partner of the Year Awards
  • Cadence Achieves EDA Certification for TSMC 5nm and 7nm+ FinFET Process Technologies to Facilitate Mobile and HPC Design Creation
  • Cadence Collaborates with TSMC to Advance 5nm and 7nm+ Mobile and HPC Design Innovation
  • Cadence Expands Virtuoso Platform with Enhanced System Design, Advanced Node Support down to 5nm, and Simulation-Driven Layout
  • Cadence Custom/Analog and Full-Flow Digital and Signoff Tools Enabled for GLOBALFOUNDRIES 7LP Process Node
  • Cadence Digital, Signoff and Custom/Analog Tools Enabled on Samsung’s 7LPP and 8LPP Process Technologies
  • Cadence Unveils Expanded Virtuoso Advanced-Node Platform for 7nm Processes
  • Cadence and TSMC Advance 7nm FinFET Designs for Mobile and HPC Platforms
  • Cadence Unveils Virtuoso Advanced-Node Platform for 10nm Processes

Webinar (3)

  • Improve Device Matching with Assisted Component P&R
  • Advanced Methodologies to Accelerate Your Custom Layout
  • Avoid Density Gradient Effects in 16FF+ Designs with Virtuoso Layout Suite GXL ModGens

Presentation (1)

  • New Virtuoso Design Platform

Video (13)

  • Improved Analog Layout Productivity Using ModGen Template-Driven Layout Reuse Methodology in Virtuoso Environment
  • Improve Device Matching with Assisted Component P&R
  • Advanced Methodologies to Accelerate Your Custom Layout
  • Avoid Density Gradient Effects in 16FF+ Designs with Virtuoso Layout Suite GXL ModGens
  • Enhancing Design Productivity at STMicroelectronics with Virtuoso Custom/Analog Flow
  • Global Unichip: 20nm Testchip Tapeout with Cadence and TSMC
  • Offering Leading Edge Total Solutions - GLOBALFOUNDRIES Design Ready 14nm Eco System
  • Virtuoso IPVS for Advanced Node Design
  • Advanced Node Multi-Patterning Technologies within Virtuoso Environment
  • Custom Layout Methodologies with Virtuoso Advanced Node
  • Virtuoso Technology for Advanced Process Nodes
  • STMicroelectronics Automates Full Custom Analog Layout Flow Using Constraints
  • Get real-time electrical feedback on 16FF designs with Virtuoso Layout Suite for Electrically Aware Design

Customer Presentation (1)

  • Improved Analog Layout Productivity Using ModGen Template-Driven Layout Reuse Methodology in Virtuoso Environment

Success Story Video (1)

  • Enhancing Design Productivity at STMicroelectronics with Virtuoso Custom/Analog Flow
VIEW ALL
Videos

Avoid Density Gradient Effects in 16FF+ Designs with Virtuoso Layout Suite GXL ModGens

Offering Leading Edge Total Solutions - GLOBALFOUNDRIES Design Ready 14nm Eco System

Physical Design Flow Challenges at 28nm on Multi-Million Gate Blocks

Virtuoso IPVS for Advanced Node Design

Enhancing Design Productivity at STMicroelectronics with Virtuoso Custom/Analog Flow

Custom Layout Methodologies with Virtuoso Advanced Node

STMicroelectronics Automates Full Custom Analog Layout Flow Using Constraints

Virtuoso Technology for Advanced Process Nodes

Advanced Node Multi-Patterning Technologies within Virtuoso Environment

Global Unichip: 20nm Testchip Tapeout with Cadence and TSMC

Silicon Signoff and Verification - 16nm FinFET Challenges and Features

Samsung Foundry 14LPP: The Continual Thrust in FinFET Leadership

Offering Leading Edge Total Solutions - GLOBALFOUNDRIES Design Ready 14nm Eco System

News ReleasesVIEW ALL
  • Cadence Wins Four 2020 TSMC OIP Partner of the Year Awards 11/02/2020

  • Cadence Digital and Custom Flows Achieve Certification for TSMC N3 Process 08/25/2020

  • Cadence Achieves Digital and Custom/Analog EDA Flow Certification for TSMC N6 and N5 Process Technologies 06/02/2020

  • Cadence and National Instruments Enter into Strategic Alliance Agreement to Enhance Electronic System Innovation 12/02/2019

  • Cadence Presented with Four 2019 TSMC Partner of the Year Awards 10/30/2019

Blogs VIEW ALL

A Great Place to Do Great Work!

Sixth year on the FORTUNE 100 list

Our Culture Join The Team
  • Products
  • Custom IC and RF
  • Digital Design and Signoff
  • IC Package
  • IP
  • PCB Design
  • System Analysis
  • Verification
  • All Products
  • Company
  • About Us
  • Leadership Team
  • Investor Relations
  • Alliances
  • Careers
  • Cadence Academic Network
  • Supplier
  • Media Center
  • Events
  • Newsroom
  • Designed with Cadence
  • Blogs
  • Forums
  • Contact Us
  • General Inquiry
  • Customer Support
  • Media Relations
  • Global Office Locator

Stay Connected

Please confirm to enroll for subscription!

Stay Connected

Thank you for subscribing. You will get an email to confirm your subscription.

© 2021 Cadence Design Systems, Inc. All Rights Reserved.

Terms of Use Privacy US Trademarks Do Not Sell My Personal Information