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CADENCE CLOUD

Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

  • Logic Equivalence Checking
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  • Achieve best PPA with the next-generation Digital Full Flow solution Learn More
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Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

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  • Solve analog simulation challenges in complex designs Watch Now
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System Design and Verification

Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.

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  • Prototype your embedded software development Watch Now
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IP

An open IP platform for you to customize your app-driven SoC design.

  • Interface IP
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  • Solve the challenges of long-reach signaling with Cadence 112G SerDes IP Watch Now
  • Meeting the needs of 5G communication with Tensilica® ConnX B20 DSP IP Download Now

IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

  • Cross-Platform Co-Design and Analysis
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  • Cadence Design Solutions certified for TSMC SoIC advanced 3D chip stacking technology Learn More
  • Four reasons to avoid multi-layer flip-chip pin padstacks Learn More

System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

  • See how to improve electrical-thermal co-simulation with the Celsius™ Thermal Solver Watch Now
  • Get true 3D system analysis with faster speeds, more capacity, and integration Watch Now
  • Electromagnetic Solutions
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Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

  • Design Authoring
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  • What's New in Allegro
  • What's New in Sigrity
  • RF / Microwave Design
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  • Watch how to easily tackle complex and cutting edge designs. Learn More
  • Learn why signal integrity analysis needs to be power-aware Watch Now
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AI / Machine Learning

AI IP Portfolio

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View all Products
  • PRODUCTS
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • Logic Equivalence Checking
        • Innovus Implementation and Floorplanning
        • Functional ECO
        • Low-Power Validation
        • Synthesis
        • Power Analysis
        • Constraints and CDC Signoff
        • Silicon Signoff and Verification
        • Library Characterization
        • Test
        • Flows
      • Custom IC / Analog / RF Design
        • Circuit Design
        • Circuit Simulation
        • Layout Design
        • Layout Verification
        • Library Characterization
        • RF / Microwave Solutions
        • Flows
      • System Design and Verification
        • Debug Analysis
        • Emulation
        • Formal and Static Verification
        • FPGA-Based Prototyping
        • Planning and Management
        • Simulation
        • Software-Driven Verification
        • Verification IP
        • System-Level Verification IP
        • Flows
      • IP
        • Interface IP
        • Denali Memory IP
        • Tensilica Processor IP
        • Analog IP
        • System / Peripherals IP
        • Verification IP
      • IC Package Design and Analysis
        • Cross-Platform Co-Design and Analysis
        • IC Package Design
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
        • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • Electromagnetic Solutions
        • RF / Microwave Design
        • Thermal Solutions
        • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
        • Design Authoring
        • PCB Layout
        • Library and Design Data Management
        • Analog/Mixed-Signal Simulation
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
        • What's New in Allegro
        • What's New in Sigrity
        • RF / Microwave Design
        • Flows
        • Advanced PCB Design & Analysis Blog
        • Augmented Reality Lab Tools
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
  • SOLUTIONS
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
  • SUPPORT
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
  • COMPANY
      • CORPORATE
        • About Us
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        • Investor Relations
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        • Computational Software
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      • CULTURE AND CAREERS
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      • CORPORATE
        • About Us
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        • Investor Relations
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        • Alliances
        • Corporate Social Responsibility
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      • MEDIA CENTER
        • Events
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      • CULTURE AND CAREERS
        • Culture and Diversity
        • Careers
      • CORPORATE
        • About Us
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        • Investor Relations
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        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • MEDIA CENTER
        • Events
        • Newsroom
        • Blogs
      • CULTURE AND CAREERS
        • Culture and Diversity
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      • CORPORATE
        • About Us
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        • Investor Relations
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      • MEDIA CENTER
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5G Baseband and Edge Computing

  • 5G Systems and Subsystems
  • 5G Handset
  • 5G Radiohead
  • 5G Baseband and Edge Computing
  • 5G Fronthaul and Backhaul

In a centralized or cloud radio access network (C-RAN), baseband cabinets move from the bottom of mobile operator masts to edge-computing facilities in the fronthaul, where centralized baseband can be dynamically shared between radioheads. Massive co-located artificial intelligence (AI) is used to optimize the baseband performance over widely varying radiohead installations and traffic, and provide the AI heavy lifting for robots, drones, and other user equipment.

5G baseband and high-performance computing (HPC) meet in mobile edge-computing centers, and like HPC, the latest digital, network, and machine learning (ML) technologies are driving the market. Fundamental to this are digital design and signoff tools with class-leading power, performance, and area (PPA) outcomes on advanced nodes, where SoC designs incorporate increasing numbers of CPU and AI processor cores.

Tell Me More About 5G

 

To enable this, Cadence provides very high capacity Cadence® Advanced-Node Solutions for digital and analog, and Arm®-based solutions. But as these multicore HPC SoCs reach the limits of reticle size, there is also a move to disaggregated SoCs that combine heterogeneous chiplets on a substrate for yield and mixed-node benefits, and here Cadence provides 3D-IC Design Solutions with the UltraLink™ D2D PHY IP for chiplet interconnection. Finally, providing dense HPC in small mobile edge-compute centers demands very high-speed board designs via Allegro® PCB Designer High-Speed Option, and electromagnetic impact analysis of multi-fabric gigabit-speed signal pathways with Cadence Electromagnetic Solutions and system thermal analysis with Cadence Thermal Solutions.

Neural networks are now being developed and deployed in a wide range of markets, from communications to surveillance. The computational, power, and memory requirements to process this data are continuously increasing, with new networks and new ways to approach deep learning every day. The Cadence® Tensilica® DNA processor family offers a much-needed breakthrough in terms of energy efficiency and performance to meet the requirements of on-device artificial intelligence (AI), including AI software development and deployment. Cadence Cache Coherent Interconnect IP and DDR IP further complement the Cadence on-device AI. 

5G software stacks will be some of the largest and most complex in the industry. Early software development is critical for successful baseband and edge computing SoCs, and Cadence hardware verification platforms such as the Palladium® Z1 Enterprise Emulation System and the Protium S1 FPGA Prototyping Platform enable early software bring-up and development on work-in-progress SoC designs incorporating CPU and AI processor cores. TCAM is natively supported in the Palladium Z1 platform for SoC switch design.

For the highest-possible communication performance, Cadence provides the Cadence 112G SerDes IP. Its unique firmware-controlled adaptive power design provides optimal power and performance tradeoffs and more efficient system designs based on platform requirements. This DSP-based architecture provides superior data recovery for lossy and noisy channels.

5G infrastructure, in common with handset design, needs high-performance and highly algorithmic digital blocks for beamforming, channelizing, and signal conditioning. Modeled in C++ or SystemC®, these blocks are retargeted and synthesized by Stratus™ High-Level Synthesis (HLS) for the highly demanding requirements of high-performance baseband infrastructure and creating highly efficient, low-power RTL for implementation with the Cadence Low-Power Solution. 

Finally for the baseband itself, Cadence provides the Tensilica ConnX B20 DSP IP in multi-core configurations for precoding/combining, beam measurement, and tracking.

  • Related Products

    • Advanced-Node Solutions
    • Arm-Based Solutions
    • 3D-IC Design Solutions
    • Allegro PCB Designer
    • Palladium Z1 Enterprise Emulation Platform
    • Protium S1 Desktop Prototyping Platform
    • Stratus High-Level Synthesis
    • Electromagnetic Solvers
    • Thermal Solutions
    • 112G SerDes IP
    • Tensilica DNA Processor
    • Ultralink D2D PHY IP
    • Tensilica ConnX B20 DSP
News ReleasesVIEW ALL
  • Cadence Announces Fourth Quarter and Fiscal Year 2020 Financial Results Webcast 01/08/2021

  • Samsung Foundry Certifies Cadence System Analysis and Advanced Packaging Design Tool Flow for 2.5/3D Chip Designs 12/16/2020

  • Samsung Foundry Adopts Spectre X Simulator for 5nm Design 12/08/2020

  • Rockley Photonics Collaborates with Cadence to Create a High-Performance System for Hyperscale Data Centers 12/02/2020

  • Cadence Appoints Julia Liuson to Board of Directors 12/01/2020

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