Resource Library

National Instruments Corporation and Cadence Design Systems, Inc. announced a system innovation strategic alliance to create an integrated design to test flow, leveraging reusable data and test IP from ele...

Cadence Design Systems, Inc. and National Instruments Corporation announced that they have entered into a definitive agreement pursuant to which Cadence expects to acquire AWR Corporation, a wholly owned s...

In this paper, we examine how a new integrated electronic/photonic design automation (EPDA) environment solves the challenges of layout, error checking, and circuit modeling, and supports first-time-right ...

Virtuoso Layout Suite L is a base-level custom physical layout environment focused on boosting productivity. It supports custom analog, digital, RF, and mixed-signal designs at the device, cell, block, and...

Virtuoso Layout Suite (VLS) for Electrically Aware Design enables the electrically correct-by-construction layout. With this solution, one can electrically analyze, simulate, and verify interconnect decisi...

AMS design challenges have significantly increased with complex design specification requirements at advanced CMOS processes. The Samsung 3nm Cadence AMS Design Reference Flow is intended to reduce design ...

In this webinar, you’ll see the new integration of the Cadence® EMX® Planar 3D Solver into the Electromagnetic Solver Assistant of the Cadence Virtuoso® Layout Suite EXL and how to leverage it in the RFIC ...