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Pushing the Performance Boundaries of ARM Cortex-M Processors for Future Embedded Design White PaperThis paper examines the challenges of design automation methodologies in the new ARM Cortex-M processor: how to get maximum performance while designing for a set power budget and how to get maximum power s...
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Analyzing and Debugging Performance Issues with Advanced ARM CoreLink System IP Components White PaperThis paper describes the challenges confronting the designer and proposes a new tool leveraging ARM® and Cadence technology to overcome the challenges of today’s highly integrated, multi-processor system-o...
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Productive Design: Hardware/Software Co-Verification with Virtual Debugging from Simulation to PrototypingThe interaction of hardware and software in Systems On Chip is complex and will affect both the functionality and the performance of the final design. Therefore it is important to present consistent debug...
07 Jan 2021
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Better PPA with Innovus Mixed Placer Technology – Gigaplace XLWith data-centric designs demanding increases in the number of on-chip storage elements, the area occupied by macros and memories has also drastically increased. With the number of rectangular macros going...
20 Oct 2020
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Cadence Collaborates with Arm and Samsung Foundry on Delivery of 5LPE Flow for Mission-Critical Applications Using Next-Generation “Hercules” CPUCadence announced that it has collaborated with Samsung Foundry and Arm to deliver a complete, high-performance digital implementation and signoff full flow for the rapid implementation of the next-generat...
08 Oct 2019
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Cadence Tools and IP Optimized for New Arm Neoverse N1 Platform to Advance the Cloud-to-Edge Infrastructure MarketCadence announced that its tools and IP have been optimized to support the new Arm Neoverse N1 platform to accelerate the transformation of a scalable cloud-to-edge infrastructure.
20 Feb 2019
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Arm, Cadence and Xilinx Introduce First Arm Neoverse System Development Platform for Next-Generation Cloud-to-Edge Infrastructure, Implemented on TSMC 7nm Process TechnologyArm, Cadence Design Systems, Inc. and Xilinx, Inc. today announced the delivery of a new development platform, silicon-proven on TSMC’s 7nm FinFET process technology, for next-generation cloud-to-edge inf...
12 Mar 2019
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Arm and Cadence collaborate on Arm Neoverse N1 platform to advance Cloud-to-Edge infrastructureStuart Riches from Arm, gives a short review of the challenges faced in 1999 when the first ASIC revolution began and how it led the way to addressing emerging markets especially in the mobile industry. He...
04 Sep 2019
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Designing an SoC on the CloudArm DAC 2019 theater presentation on Designing an SoC on the Cloud.
05 Jun 2019
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Cadence Verification Suite Enabled on Arm-Based HPC DatacentersCadence announced that its Verification Suite is now enabled for Arm-based high-performance computing (HPC) server environments.
16 Oct 2018
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