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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
      • Multiphysics System Analysis
        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
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          • Clarity 3D Solver
          • Clarity 3D Solver Cloud
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Fidelity CFD
          • Sigrity Advanced SI
          • Celsius Advanced PTI
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          • System Analysis Center
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • Allegro X Design Platform
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  • 2021
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  • 12 Nov 2021

Cadence Wins Four 2021 TSMC OIP Partner of the Year Awards, Featuring Key Advancements in 3DFabric Design and Cloud-Based Solutions

Joint development of 4nm design infrastructure and DSP IP also recognized

SAN JOSE, Calif., 12 Nov 2021

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has won four Open Innovation Platform® (OIP) Partner of the Year awards from TSMC for their core EDA, IP and systems solutions. Cadence achieved recognition for the Joint Development of 4nm Design Infrastructure, 3DFabric™ Design Solution, Cloud-based Productivity Solution and DSP IP.

Cadence achieved these recognitions based on collaborative work with TSMC:

  • 4nm design infrastructure: Cadence worked closely with TSMC to optimize the complete, integrated digital flow for the TSMC N4 process to help customers achieve power, performance and area (PPA) goals and speed time to market. In addition, Cadence delivered a comprehensive custom, analog, EM-IR and mixed-signal design solution, addressing the challenges and complexities for designing custom and analog IP on the TSMC N4 process.
  • 3DFabric design solution: Cadence collaborated with TSMC to ensure that the new Cadence® Integrity™ 3D-IC platform, the industry’s first unified platform for 3D-IC planning, implementation and system analysis, is enabled for the TSMC 3DFabric™, a comprehensive family of 3D silicon stacking and advanced packaging technologies. Cadence Tempus™ Timing Signoff Solution has also been enhanced to support a new stacking static timing analysis (STA) signoff methodology, shortening design turnaround time.
  • Cloud-based productivity solution: Cadence delivered the Tempus Timing Signoff Solution with a cloud-ready distributed static timing analysis (DSTA) architecture with giga-scale techniques that let designers quickly optimize the best cloud configuration to balance wall time and cost.
  • DSP IP: Cadence worked with TSMC’s Soft IP9000 team to certify Cadence Tensilica® DSP IP in the TSMC integration flow.

“Over the course of many years, we’ve worked closely with Cadence to ensure our mutual customers have access to the latest technologies needed to innovate and achieve the best possible design results,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. “The TSMC OIP Partner of the Year awards show that our ecosystem partners are committed to enabling customer success, and we look forward to seeing our customers leverage our advanced technologies to stay in front of the competition in their respective markets.”

“By continuing to collaborate with TSMC, we’re enabling mutual customers to deliver designs with confidence and meet design goals by leveraging our newest technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager of the Digital & Signoff Group at Cadence. “These prestigious TSMC awards highlight Cadence’s dedication to enabling SoC design excellence via our Intelligent System Design strategy, and we are committed to continue innovating to ensure our customers have the tools they need to create emerging mobile, automotive and hyperscale computing applications and more.”

About Cadence

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

For more information, please contact:

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408-944-7039
newsroom@cadence.com

© 2021 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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