Highlights:
- Complete Cadence RTL to GDS flow developed for rapid implementation of advanced Arm-based CPU
- Companies created a corresponding RAK to facilitate use of the 5LPE Arm CPU flow
- Implementation based on Arm 5LPE performance-optimized libraries and memories
- Flow tuned to deliver the power and performance benefits of Samsung Foundry 5LPE process node
Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that it has collaborated with Samsung Foundry and Arm to deliver a complete, high-performance digital implementation and signoff full flow for the rapid implementation of the next-generation Arm® “Hercules” CPU using the Samsung Foundry 5nm Low-Power Early (5LPE) process technology. The Cadence® flow that has been optimized for the Samsung Foundry 5LPE process can enable customers to deliver mission-critical, high-performance and high-quality designs to market faster. A corresponding rapid adoption kit (RAK) has also been developed to facilitate easy use of the 5LPE flow for customers.
“This high-performance flow, developed based on the Samsung Foundry 5LPE process and Cadence RTL-to-GDS tools for the next-generation Arm CPU IP, marks yet another major milestone in our ongoing collaboration ,” said Jaehong Park, executive vice president of Foundry Design Platform Development at Samsung Electronics. “Customers can now adopt Samsung’s 5LPE process ensured that the Cadence flow and Arm IP are ready for use.”
“Collaborating with Cadence on Arm’s next-generation CPU can enable us to further optimize for power and performance,” said Paul Williamson, vice president and general manager, Client Line of Business, Arm. “Additionally, in working with Samsung Foundry at the 5LPE process node, we are able to provide our mutual customers with performance-optimized libraries and memories to maximize the benefits of this advanced node.”
The flow has been finely tuned to deliver the power and performance benefits of the Samsung Foundry 5LPE process technology. The complete Cadence RTL-to-GDS flow includes the Genus™ Synthesis Solution, Innovus™ Implementation System, Joules™ RTL Power Solution, Modus DFT Software Solution, Quantus™ Extraction Solution, Tempus™ Timing Signoff Solution, Voltus™ IC Power Integrity Solution, Physical Verification System, Conformal® Equivalence Checking, Conformal Low Power, Litho Physical Analyzer and Cadence CMP Predictor. For more information on the Cadence digital implementation and signoff full flow, please visit www.cadence.com/go/dandssapr.
“By collaborating with Samsung Foundry and Arm, Cadence is continuing to drive high-performance design innovation required for mobile, infrastructure and server applications,” said KT Moore, vice president, product management in the Digital & Signoff Group at Cadence. “The Cadence digital and signoff full flow delivers all the key capabilities necessary to ensure that customers can achieve power, performance and area goals to meet competitive market demands using Samsung Foundry’s 5LPE process technology.”
The integrated Cadence digital implementation and signoff full flow provides customers with a fast path to design closure and better predictability. The tools in the flow support the company’s Intelligent System Design™ strategy, enabling advanced-node system-on-chip (SoC) design excellence.
