Home
  • PRODUCTS
  • SOLUTIONS
  • SUPPORT
  • COMPANY
  • EN US
    • SELECT YOUR COUNTRY OR REGION

    • China - 简体中文
    • Japan - 日本語
    • Korea - 한국어
    • Taiwan - 繁體中文

DESIGN EXCELLENCE

  • Digital Design and Signoff
  • Custom IC
  • Verification
  • IP
  • IC Package

SYSTEM INNOVATION

  • System Analysis
  • Embedded Software
  • PCB Design

PERVASIVE INTELLIGENCE

  • AI / Machine Learning
  • AI IP Portfolio

CADENCE CLOUD

Digital Design and Signoff

Cadence® digital design and signoff solutions provide a fast path to design closure and better predictability, helping you meet your power, performance, and area (PPA) targets.

  • Logic Equivalence Checking
  • Innovus Implementation and Floorplanning
  • Functional ECO
  • Low-Power Validation
  • Synthesis
  • Power Analysis
  • Constraints and CDC Signoff
  • Silicon Signoff and Verification
  • Library Characterization
  • Test
  • Flows
  • Achieve best PPA with the next-generation Digital Full Flow solution Learn More
  • Address digital implementation challenges with machine learning Watch Now

Custom IC / Analog / RF Design

Cadence® custom, analog, and RF design solutions can help you save time by automating many routine tasks, from block-level and mixed-signal simulation to routing and library characterization.

  • Circuit Design
  • Circuit Simulation
  • Layout Design
  • Layout Verification
  • Library Characterization
  • RF / Microwave Solutions
  • Flows
  • Solve analog simulation challenges in complex designs Watch Now
  • See how the Virtuoso Design Platform addresses advanced custom IC and system design challenges Watch Now

System Design and Verification

Cadence® system design and verification solutions, integrated under our Verification Suite, provide the simulation, acceleration, emulation, and management capabilities.

  • Debug Analysis
  • Emulation
  • Formal and Static Verification
  • FPGA-Based Prototyping
  • Planning and Management
  • Simulation
  • Software-Driven Verification
  • Verification IP
  • System-Level Verification IP
  • Flows
  • Prototype your embedded software development Watch Now
  • Learn how early firmware development enabled first silicon success at Toshiba Memory Watch Now

IP

An open IP platform for you to customize your app-driven SoC design.

  • Interface IP
  • Denali Memory IP
  • Tensilica Processor IP
  • Analog IP
  • System / Peripherals IP
  • Verification IP
  • Solve the challenges of long-reach signaling with Cadence 112G SerDes IP Watch Now
  • Meeting the needs of 5G communication with Tensilica® ConnX B20 DSP IP Download Now

IC Package Design and Analysis

Driving efficiency and accuracy in advanced packaging, system planning, and multi-fabric interoperability, Cadence® package implementation products deliver the automation and accuracy.

  • Cross-Platform Co-Design and Analysis
  • IC Package Design
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • Flows
  • Cadence Design Solutions certified for TSMC SoIC advanced 3D chip stacking technology Learn More
  • Four reasons to avoid multi-layer flip-chip pin padstacks Learn More

System Analysis

Cadence® system analysis solutions provide highly accurate electromagnetic extraction and simulation analysis to ensure your system works under wide-ranging operating conditions.

  • See how to improve electrical-thermal co-simulation with the Celsius™ Thermal Solver Watch Now
  • Get true 3D system analysis with faster speeds, more capacity, and integration Watch Now
  • Electromagnetic Solutions
  • RF / Microwave Design
  • Thermal Solutions
  • System Analysis Resources Hub

Embedded Software

PCB Design and Analysis

Cadence® PCB design solutions enable shorter, more predictable design cycles with greater integration of component design and system-level simulation for a constraint-driven flow.

  • Design Authoring
  • PCB Layout
  • Library and Design Data Management
  • Analog/Mixed-Signal Simulation
  • SI/PI Analysis
  • SI/PI Analysis Point Tools
  • What's New in Allegro
  • What's New in Sigrity
  • RF / Microwave Design
  • Flows
  • Advanced PCB Design & Analysis Blog
  • Watch how to easily tackle complex and cutting edge designs. Learn More
  • Learn why signal integrity analysis needs to be power-aware Watch Now
  • Augmented Reality Lab Tools

AI / Machine Learning

AI IP Portfolio

INDUSTRIES

  • 5G Systems and Subsystems
  • Aerospace and Defense
  • Automotive
  • AI / Machine Learning

TECHNOLOGIES

  • 3D-IC Design
  • Advanced Node
  • Arm-Based Solutions
  • Cloud Solutions
  • Low Power
  • Mixed Signal
  • Photonics
  • RF / Microwave
See how our customers create innovative products with Cadence Explore Now

SUPPORT

  • Support Process
  • Online Support
  • Software Downloads
  • Computing Platform Support
  • Customer Support Contacts
  • Technical Forums

TRAINING

  • Custom IC / Analog / RF Design
  • Languages and Methodologies
  • Digital Design and Signoff
  • IC Package
  • PCB Design
  • System Design and Verification
  • Tensilica Processor IP
Stay up to date with the latest software Download Now
24/7 - Cadence Online Support Visit Now

CORPORATE

  • About Us
  • Designed with Cadence
  • Investor Relations
  • Leadership Team
  • Computational Software
  • Alliances
  • Corporate Social Responsibility
  • Cadence Academic Network

MEDIA CENTER

  • Events
  • Newsroom
  • Blogs

CULTURE AND CAREERS

  • Culture and Diversity
  • Careers
Learn how Intelligent System Design™ powers future technologies Learn More
Browse Cadence’s latest on-demand sessions and upcoming events. Explore More
View all Products
  • PRODUCTS
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • Logic Equivalence Checking
        • Innovus Implementation and Floorplanning
        • Functional ECO
        • Low-Power Validation
        • Synthesis
        • Power Analysis
        • Constraints and CDC Signoff
        • Silicon Signoff and Verification
        • Library Characterization
        • Test
        • Flows
      • Custom IC / Analog / RF Design
        • Circuit Design
        • Circuit Simulation
        • Layout Design
        • Layout Verification
        • Library Characterization
        • RF / Microwave Solutions
        • Flows
      • System Design and Verification
        • Debug Analysis
        • Emulation
        • Formal and Static Verification
        • FPGA-Based Prototyping
        • Planning and Management
        • Simulation
        • Software-Driven Verification
        • Verification IP
        • System-Level Verification IP
        • Flows
      • IP
        • Interface IP
        • Denali Memory IP
        • Tensilica Processor IP
        • Analog IP
        • System / Peripherals IP
        • Verification IP
      • IC Package Design and Analysis
        • Cross-Platform Co-Design and Analysis
        • IC Package Design
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
        • Flows
    • SYSTEM INNOVATION
      • System Analysis
        • Electromagnetic Solutions
        • RF / Microwave Design
        • Thermal Solutions
        • System Analysis Resources Hub
      • Embedded Software
      • PCB Design and Analysis
        • Design Authoring
        • PCB Layout
        • Library and Design Data Management
        • Analog/Mixed-Signal Simulation
        • SI/PI Analysis
        • SI/PI Analysis Point Tools
        • What's New in Allegro
        • What's New in Sigrity
        • RF / Microwave Design
        • Flows
        • Advanced PCB Design & Analysis Blog
        • Augmented Reality Lab Tools
    • PERVASIVE INTELLIGENCE
      • AI / Machine Learning
      • AI IP Portfolio
    • CADENCE CLOUD
  • SOLUTIONS
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
      • INDUSTRIES
        • 5G Systems and Subsystems
        • Aerospace and Defense
        • Automotive
        • AI / Machine Learning
      • TECHNOLOGIES
        • 3D-IC Design
        • Advanced Node
        • Arm-Based Solutions
        • Cloud Solutions
        • Low Power
        • Mixed Signal
        • Photonics
        • RF / Microwave
  • SUPPORT
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
      • SUPPORT
        • Support Process
        • Online Support
        • Software Downloads
        • Computing Platform Support
        • Customer Support Contacts
        • Technical Forums
      • TRAINING
        • Custom IC / Analog / RF Design
        • Languages and Methodologies
        • Digital Design and Signoff
        • IC Package
        • PCB Design
        • System Design and Verification
        • Tensilica Processor IP
  • COMPANY
      • CORPORATE
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • MEDIA CENTER
        • Events
        • Newsroom
        • Blogs
      • CULTURE AND CAREERS
        • Culture and Diversity
        • Careers
      • CORPORATE
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • MEDIA CENTER
        • Events
        • Newsroom
        • Blogs
      • CULTURE AND CAREERS
        • Culture and Diversity
        • Careers
      • CORPORATE
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • MEDIA CENTER
        • Events
        • Newsroom
        • Blogs
      • CULTURE AND CAREERS
        • Culture and Diversity
        • Careers
      • CORPORATE
        • About Us
        • Designed with Cadence
        • Investor Relations
        • Leadership Team
        • Computational Software
        • Alliances
        • Corporate Social Responsibility
        • Cadence Academic Network
      • MEDIA CENTER
        • Events
        • Newsroom
        • Blogs
      • CULTURE AND CAREERS
        • Culture and Diversity
        • Careers

  • Home
  •   :  
  • About Us
  •   :  
  • Newsroom
  •   :  
  • News Releases
  •   :  
  • 2019
  •   :  
  • 02 Dec 2019

Cadence and National Instruments Enter into Strategic Alliance Agreement to Enhance Electronic System Innovation

AUSTIN, Texas, 02 Dec 2019

National Instruments Corporation (Nasdaq: NATI) and Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced a system innovation strategic alliance to create an integrated design to test flow, leveraging reusable data and test IP from electronics design and verification to validation and production test for electronic system and semiconductor companies. This strategic alliance builds upon the broad-ranging collaboration that National Instruments (NI) and Cadence initiated in 2018 to improve the overall semiconductor development and testing of next-generation wireless, automotive and mobile integrated circuits (ICs) and modules. Through the strategic alliance agreement, NI and Cadence expect the joint development of technology, methodology and intellectual property to streamline electronics development.

The objective is to provide customers with a seamless flow from pre-silicon development to post-silicon test, leveraging design, verification and analysis data between Cadence and NI technologies. The collaboration is anchored in analog, mixed-signal and RF integrations around the Cadence® Virtuoso® and Spectre® platforms, and physical data from the NI LabVIEW and PXI modular instrumentation systems, which customers can use to enhance system design via a comprehensive flow from concept to volume production to help them achieve faster time to market and lower overall costs.

“The rapid product expansion in the wireless, consumer, automotive, and aerospace and defense market segments calls for an accelerated pace of system innovation and collaboration,” said Lip Bu Tan, chief executive officer at Cadence. “By working even more closely with NI on this strategic alliance, we aim to deliver an integrated flow from pre-silicon mixed-signal design and verification to post-silicon validation and test, shortening the overall time to electronic product creation.”

Cadence and NI also plan to collaborate to define and build a common, connected flow enabling re-use of mixed-signal testbenches and stimulus from pre-silicon design verification to post-silicon validation and production test. Reusable test IP helps customers accelerate their time to market and reduce errors. A goal of the collaboration is to better integrate flows for analog/mixed-signal and RF ICs and modules from design to test.

“Cadence is the ideal partner for National Instruments as we work together to define the next generation of design to test methodology,” said Alex Davern, chief executive officer at National Instruments. “By combining NI’s advanced semiconductor validation and test systems with Cadence’s industry-leading technology in analog mixed-signal and RF design and verification, we can help our customers accelerate time to market, reduce costs and improve product quality. We look forward to working with Cadence to make this vision a reality in a fast-paced environment.”

In addition to the strategic alliance agreement, Cadence and NI have entered into a definitive agreement pursuant to which Cadence expects to acquire AWR Corporation, a wholly owned subsidiary of NI. For more information, please see www.cadence.com/go/awracquisition.

About National Instruments

NI (ni.com) develops high-performance automated test and automated measurement systems to help you solve your engineering challenges now and into the future. Our open, software-defined platform uses modular hardware and an expansive ecosystem to help you turn powerful possibilities into real solutions. Learn more at www.ni.com.

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s Intelligent System Design™ strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.

National Instruments Forward-Looking Statements

This press release contains certain forward-looking statements of NI, including statements regarding the expected benefits of the strategic alliance with Cadence, that the alliance will create an integrated design to test flow leveraging reusable data and test IP from electronics design and verification to validation and production test for electronic system and semiconductor companies, that through the system innovation alliance agreement, NI and Cadence expect the joint development of technology, methodology and intellectual property to streamline electronics development, that the objective is to provide customers with a seamless flow from pre-silicon development to post-silicon test, the plan to collaborate to define and build a common, connected flow enabling re-use of mixed-signal testbenches and stimulus from pre-silicon design verification to post-silicon validation and production test, a goal of the collaboration being to better integrate flows for analog/mixed-signal and RF ICs and modules from design to test, that Cadence is the ideal partner for National Instruments as we work together to define the next generation of design to test methodology, and that we can help our customers accelerate time to market, reduce costs and improve product quality. These forward-looking statements are subject to numerous risks, uncertainties and other factors, many of which are outside of the control of NI, including, among others: the failure or inability of Cadence or NI to meet the closing conditions or to otherwise consummate the AWR acquisition transaction, the ability of the parties to realize the expected benefits of the strategic alliance agreement including the integrated product being tightly connected with the NI LabVIEW and PXI modular instrumentation systems, the risk of adverse changes or fluctuations in the global economy, further adverse fluctuations in NI’s industry, foreign exchange fluctuations, fluctuations in demand for NI products including orders from NI’s large customers, component shortages, delays in the release of new products, NI’s ability to effectively manage its operating expenses, manufacturing inefficiencies and the level of capacity utilization, the impact of any recent or future acquisitions by NI, expense overruns, and adverse effects of price changes or effective tax rates. Actual results may differ materially from the expected results. NI directs readers to its Form 10-K for the year ended Dec. 31, 2018, its Form 10-Q for the quarter ended September 30, 2019 and the other documents it files with the SEC for other risks associated with its future performance. NI undertakes no obligation to update any forward-looking statement in this press release. Stockholders are cautioned not to place undue reliance on the forward-looking statements herein, which speak only as of the date such statements are made.

Cadence Forward-Looking Statements

This press release contains forward-looking statements, including statements regarding the expected benefits to Cadence, its products and its customers from the strategic alliance, that are based on current expectations and preliminary assumptions that are subject to factors and uncertainties that could cause actual results to differ materially from those described in the forward-looking statements. These forward-looking statements are subject to a number of risks, uncertainties and other factors, many of which are outside Cadence’s control, including the failure or inability to close the acquisition of AWR Corporation by Cadence and to realize the expected benefits of the strategic alliance agreement, the changes in customer demands and markets, and other risk factors set forth in Cadence’s most recent reports on Form 10-K and Form 10-Q. Cadence undertakes no obligation to update any forward-looking statement in this press release.

For more information, please contact:

Cadence Newsroom
408-944-7039
newsroom@cadence.com

Marissa Vidaurri
Head of Investor Relations, National Instruments
512-773-0856
marissa.vidaurri@ni.com

© 2019 National Instruments Corporation and Cadence Design Systems, Inc. All rights reserved worldwide.

National Instruments, NI, ni.com and LabVIEW are trademarks of National Instruments. Other product and company names listed are trademarks or trade names of their respective companies.

Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

Media Contacts

For more information, please contact:

Cadence Newsroom

408.944.7039

newsroom@cadence.com

A Great Place to Do Great Work!

Sixth year on the FORTUNE 100 list

Our Culture Join The Team
  • Products
  • Custom IC and RF
  • Digital Design and Signoff
  • IC Package
  • IP
  • PCB Design
  • System Analysis
  • Verification
  • All Products
  • Company
  • About Us
  • Leadership Team
  • Investor Relations
  • Alliances
  • Careers
  • Cadence Academic Network
  • Supplier
  • Media Center
  • Events
  • Newsroom
  • Designed with Cadence
  • Blogs
  • Forums
  • Contact Us
  • General Inquiry
  • Customer Support
  • Media Relations
  • Global Office Locator

Stay Connected

Please confirm to enroll for subscription!

Stay Connected

Thank you for subscribing. You will get an email to confirm your subscription.

© 2021 Cadence Design Systems, Inc. All Rights Reserved.

Terms of Use Privacy US Trademarks Do Not Sell My Personal Information
Connect with us