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  • Products

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      Cadence.AI

      • Millennium Platform

        AI-driven digital twin supercomputer

      • Cadence Cerebrus AI Studio

        Multi-block, multi-user SoC design platform

      • Optimality Intelligent System Explorer

        AI-driven Multiphysics analysis

      • Verisium Verification Platform

        AI-driven verification platform

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        AI-driven PCB Design

      • Tensilica AI Platform

        On-device AI IP

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      IC Design & Verification

      • Virtuoso Studio

        Analog and custom IC design

      • Spectre Simulation

        Analog and mixed-signal SoC verification

      • Innovus+ Platform

        Synthesis and implementation for advanced nodes

      • Xcelium Logic Simulation

        IP and SoC design verification

      • Silicon Solutions

        Protocol IP and Compute IP, including Tensilica IP

      • Palladium and Protium

        Emulation and prototyping platforms

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        System and PCB design platform

      • Allegro X Adv Package Designer Platform

        IC packaging design and analysis platform

      • Sigrity X Platform

        Signal and power integrity analysis platform

      • AWR Design Environment Platform

        RF and microwave development platform

      • Cadence Reality Digital Twin Platform

        Data center design and management platform

      • Fidelity CFD Platform

        Computational fluid dynamics platform

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  • 2019
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  • 17 Oct 2019

Cadence 3D-IC Advanced Packaging Integration Flow Certified by Samsung Foundry for its 7LPP Process Technology

Cadence full flow enables the planning, implementation and analysis of advanced multi-die and chiplet-based IC packaging

SAN JOSE, Calif., 17 Oct 2019

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the complete, integrated Cadence® 3D-IC advanced packaging integration flow has achieved certification for the Samsung Foundry MDI™ (Multi-Die-Integration) packaging flow based on the 7nm Low Power Process (7LPP) technology. The reference flow was developed in close collaboration with Samsung Foundry to provide mutual customers with a full planning, implementation and analysis flow for 3D multi-die packages. For more information on the Cadence tools that support the Samsung Foundry MDI packaging technology, please visit www.cadence.com/go/3dicspr.

The use of multiple stacked chips in a single package is becoming a key trend for mobile, IoT and data center designs, which is also extending into the AI and 5G market segments due to the rapid and efficient integration of complete functions that can be implemented via the optimal process node into a system in package (SiP). The Cadence technology provides customers with analysis, implementation and physical verification capabilities within a single canvas and offers unique, early-stage system-level pathfinding and highly-complex design capabilities for 3D signoff. The Cadence flow has been optimized to enable customers to achieve all the benefits the Samsung Foundry MDI packaging technology has to offer in order to deliver new products to market with greater speed and agility.

“Mutual customers addressing various types of design sizes and complexities can benefit from the new MDI flow based on Cadence’s flexible suite of advanced 3D packaging tools, which aims to support the integration of multiple application-specific die and chiplets into a single packaged device that is optimized for their target application,” said Jung Yun Choi, vice president of Foundry Design Technology Team at Samsung Electronics. “This collaboration between Cadence and Samsung provides customers with both reduction in cost and turnaround time through the accurate, broad analysis of system-level and complex interconnects.”

A full suite of Cadence digital and signoff as well as IC package and PCB analysis tools have been optimized for the Samsung MDI technology to guarantee seamless integration for handling multiple dies including the Innovus™ Implementation System, Quantus™ Extraction Solution, Tempus™ Timing Signoff Solution, Voltus™ IC Power Integrity Solution, OrbitIO™ interconnect designer, SiP Layout, Sigrity™ XtractIM™ technology, Sigrity XcitePI™ technology, Sigrity SystemSI™ technology, and Sigrity PowerDC™ technology.

“This is an example of how, through our continued partnership with Samsung Foundry, we’re developing innovative solutions for our mutual customers,” said KT Moore, vice president, product management, Digital & Signoff Group at Cadence. “This seamless 3D integrated flow developed by Cadence and Samsung Foundry enables our customers to design multi-die offerings in a single integrated environment, enabling the delivery of complex products much faster.”

The Cadence 3D-IC packaging flow provides a fast path to design closure and supports the company’s overall Intelligent System Design™ strategy, enabling advanced-node system-on-chip (SoC) design excellence.

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s Intelligent System Design strategy helps customers develop differentiated products—from chips to boards to intelligent systems—in mobile, consumer, cloud, data center, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.

For more information, please contact:

Cadence Newsroom
408-944-7039
newsroom@cadence.com

© 2019 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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