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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
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          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
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          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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          • Computational Fluid Dynamics
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          • Library and Design Data Management
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          • Augmented Reality Lab Tools
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  • 16 Oct 2018

Cadence Verification Suite Enabled on Arm-Based HPC Datacenters

SAN JOSE, Calif., 16 Oct 2018

Highlights:

  • HPE Apollo 70 System built on Marvell ThunderX2 processors using the Armv8-A architecture runs Cadence Verification Suite software tools including Xcelium Parallel Logic Simulation Platform, JasperGold Formal Verification Platform, vManager Metric-Driven Signoff Platform, Indago Debug Platform and Verification IP catalog
  • Cadence tools on HPE’s Apollo 70 System provide a comprehensive verification environment with the flexibility to optimize compute capacity for customers in diverse industries such as mobile, artificial intelligence, automotive, aerospace and defense, industrial and IoT sensor markets

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that the Cadence® Verification Suite is now enabled for Arm®-based high-performance computing (HPC) server environments. Through an industry ecosystem collaboration, software tools in the Cadence Verification Suite, including Xcelium™ Parallel Logic Simulation, run on the Hewlett Packard Enterprise (HPE) Apollo 70 System, which is built using the Marvell® ThunderX2® processor based on the Armv8-A architecture. The collaboration provides customers with a compute option that HPE indicates can be up to 19 percent more cost effective than other HPE industry-standard servers, enabling a new level of flexibility to make tradeoff decisions pertaining to internal project priorities, user license allocation, unlicensed task execution and time to project completion.

As part of the Cadence System Design Enablement strategy, the Cadence Verification Suite technologies supports execution of verification tasks on the HPE Apollo 70 System including high-throughput regressions and scalable multi-core utilization for long-runtime simulations. The Cadence Verification Suite for Arm-based servers now includes the Xcelium Parallel Logic Simulation Platform, JasperGold® Formal Verification Platform, vManager™ Metric-Driven Signoff Platform, Indago™ Debug Platform and the Verification IP catalog. These products are licensed using Flexera’s software monetization platform through a collaboration that enabled it for Arm-based servers. By deploying Apollo HPE 70 Systems with the Cadence Verification Suite, customers across various industries such as mobile, artificial intelligence (AI), automotive, aerospace and defense, industrial and IoT sensor markets can further optimize semiconductor verification. For more information on the Cadence Verification Suite for Arm-based servers, please visit www.cadence.com/go/verificationsuiteeco.

“Chip designers are faced with intense verification pressures such as shorter product design cycles, increasing complexity, added quality requirements and continuous cost reduction,” said Paul Cunningham, corporate vice president and general manager of the System & Verification Group at Cadence. “These challenges are driving continuous datacenter innovation, and together with HPE, Marvell and Arm, we are enabling our customers to choose from an expanded portfolio of high-capacity datacenters when using our verification solutions.”

To learn more about the ecosystem solution, please see the white paper titled, “Delivering Superior Verification Capacity for EDA Workloads,” at www.cadence.com/go/verificationecowp.  

Ecosystem Endorsements

“We are using Cadence Xcelium Parallel Logic Simulation on Arm-based production servers, and the additional support from Cadence Verification Suite technologies not only reduces development costs but enables the deployment of additional resources needed for more complete verification. The deployment of the Cadence EDA tools on the HPE Apollo 70 System is another step forward in the continued adoption of the Arm architecture across the infrastructure.”
- Drew Henry, senior vice president and general manager, Infrastructure Business Unit, Arm

“HPE Apollo 70 Systems with the Marvell ThunderX2 Arm-based processor provide a new multi-core and high job-throughput hardware choice for the EDA market. We look forward to collaborating with Cadence to offer our joint EDA customers a leading HPC Arm-based solution, enabling them to run the Cadence Verification Suite either on-premise or off-premise.”

-Bill Mannel, vice president and general manager, HPC and AI, Hewlett Packard Enterprise

“The Marvell ThunderX2 processor is the industry’s most widely adopted Arm server processor and delivers best-in-class compute performance and memory bandwidth so critical for EDA workdloads like the Cadence Verification Suite. Our partnership with Cadence and HPE demonstrates the value of driving an optimized solution with a fully integrated platform enabling easy end user deployments at scale.”

- Gopal Hegde, vice president and general manager, Server Processor Business Unit at Marvell

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.

For more information, please contact:

Cadence Newsroom
408-944-7039
newsroom@cadence.com

© 2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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