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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
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          • Spectre X Simulator
          • Spectre FX Simulator
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • Jasper C Apps
          • Helium Virtual and Hybrid Studio
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • 112G/56G SerDes
          • Chiplet and D2D
          • Denali Memory Interface and Storage IP
          • Interface IP
          • PCIe and CXL
          • Tensilica Processor IP
        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
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          • Clarity 3D Transient Solver
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          • Augmented Reality Lab Tools
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  • 19 Jul 2018

Cadence Sigrity 2018 Release Accelerates PCB Design Cycles by Integrating 3D Design and 3D Analysis

New 3D Workbench utility bridges PCB design and analysis to optimize cost and performance of PCB designs

SAN JOSE, Calif., 19 Jul 2018

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced its Cadence® Sigrity™ 2018 release, which includes new 3D capabilities that enable PCB design teams to accelerate design cycles while optimizing cost and performance. A unique, 3D design and 3D analysis environment integrating Sigrity tools with Cadence Allegro® technology provides a more efficient and less error-prone solution than current alternatives utilizing third-party modeling tools, saving days of design cycle time and reducing risk. In addition, a new 3D Workbench methodology bridges the gap between the mechanical and electrical domains, allowing product development teams to analyze signals that cross multiple boards quickly and accurately. For more information, please visit www.cadence.com/go/sigrity2018.

Since many high-speed signals cross PCB boundaries, effective signal integrity analysis must encompass the signal source and destination die, as well as the intervening interconnect and return path including connectors, cables, sockets and other mechanical structures. Traditional analysis techniques utilize a separate model for each piece of interconnect and cascade these models together in a circuit simulation tool, which can be an error-prone process due to the 3D nature of the transition from the PCB to the connector. In addition, since the 3D transition can make or break signal integrity, at very high speeds designers also want to optimize the transition from the connector to the PCB or the socket to the PCB.

The Sigrity 2018 release enables designers to take a holistic view of their system, extending design and analysis beyond the package and board to also include connectors and cables, all of which can impact optimization of the high-speed interconnect. An integrated 3D design and 3D analysis environment allows PCB design teams to optimize the high-speed interconnect of PCBs and IC packages in the Sigrity tool and automatically implement the optimized PCB and IC package interconnect in Allegro PCB, Allegro Package Designer, or Allegro SiP Layout without the need to redraw. Until now, this has been an error-prone, manual effort requiring careful validation. By automating this process, the Sigrity 2018 release reduces risk, saves designers hours of re-drawing and re-editing and can save days of design cycle time by eliminating editing errors not found until the prototype reaches the lab. This reduces prototype iterations and potentially saves hundreds of thousands of dollars by avoiding re-spins and schedule delays.

A new 3D Workbench utility available with the Sigrity 2018 release bridges the mechanical components and the electronic design of PCB and IC packages, allowing connectors, cables, sockets and the PCB breakout to be modeled as one with no double counting of any of the routing on the board. Interconnect models are divided at a point where the signals are more 2D in nature and predictable. By allowing 3D extraction to be performed only when needed and fast, accurate 2D hybrid-solver extraction to be performed on the remaining structures before all the interconnect models are stitched back together, full end-to-end channel analysis can be performed efficiently and accurately of signals crossing multiple boards.

In addition, the Sigrity 2018 release offers Rigid-Flex support for field solvers such as the Sigrity PowerSI® technology, enabling robust analysis of high-speed signals that pass from rigid PCB materials to flexible materials. Design teams developing Rigid-Flex designs can now use the same techniques previously used only on rigid PCB designs, creating continuity in analysis practices while PCB manufacturing and material processes continue to evolve.

“At Lite-On, our Storage Business Group (SBG) focuses on solid state disk enterprise datacenter product design. It has become increasingly important to consider signal and power integrity on our extremely dense designs,” said Andy Hsu, Lite-On SBG R&D head. “In order to enhance 2D layout and 3D connector structure integration, Lite-On SBG has accelerated our design cycle by adopting the Cadence 3D solutions including Sigrity PowerSI 3DEM and the Sigrity 3D Workbench, which support seamless use of Cadence Allegro layout and Sigrity extraction tools. Our engineers can simulate more accurately and efficiently and deliver customer-oriented results.”

“The Sigrity 2018 release takes a giant step forward by tightly coupling technology from multiple product teams at Cadence,” said Tom Beckley, senior vice president and general manager of the Custom IC & PCB Group at Cadence. “With the integration of 3D technology from the Allegro and Sigrity teams, we continue to polish our customers’ path to system design enablement by enabling them to take a more holistic approach to product optimization encompassing not only the chip, package and board but also the mechanical structures.”

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.

For more information, please contact:

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© 2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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