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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Genus Synthesis Solution
          • Conformal Smart LEC
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
        • PRODUCT CATEGORIES
          • Circuit Design
          • Circuit Simulation
          • Layout Design
          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
        • FEATURED PRODUCTS
          • Spectre X Simulator
          • Virtuoso RF Solution
          • Virtuoso Layout Suite
          • Virtuoso ADE Product Suite
          • Virtuoso Advanced Node
          • Voltus IC Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Emulation and Prototyping
          • Formal and Static Verification
          • Planning and Management
          • Simulation
          • Software-Driven Verification
          • Verification IP
          • System-Level Verification IP
        • FEATURED PRODUCTS
          • vManager Verification Management
          • JasperGold Formal Verification Platform
          • Xcelium Logic Simulation
          • Palladium Enterprise Emulation
          • Protium Enterprise Prototyping
          • System VIP
          • RESOURCES
          • Flows
      • IP
        • PRODUCT CATEGORIES
          • Interface IP
          • Denali Memory IP
          • Tensilica Processor IP
          • Analog IP
          • System / Peripherals IP
          • Verification IP
      • IC Package Design and Analysis
        • PRODUCT CATEGORIES
          • Cross-Platform Co-Design and Analysis
          • IC Package Design
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • Flows
    • SYSTEM INNOVATION
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        • PRODUCT CATEGORIES
          • Computational Fluid Dynamics
          • Electromagnetic Solutions
          • RF / Microwave Design
          • Signal and Power Integrity
          • Thermal Solutions
        • FEATURED PRODUCTS
          • Clarity 3D Solver
          • Clarity 3D Transient Solver
          • Celsius Thermal Solver
          • Omnis
          • Sigrity Advanced SI
          • Sigrity Advanced PI
          • RESOURCES
          • System Analysis Resources Hub
          • AWR Free Trial
      • Embedded Software
      • PCB Design and Analysis
        • PRODUCT CATEGORIES
          • Design Authoring
          • PCB Layout
          • Library and Design Data Management
          • Analog/Mixed-Signal Simulation
          • SI/PI Analysis
          • SI/PI Analysis Point Tools
          • RF / Microwave Design
          • Augmented Reality Lab Tools
        • FEATURED PRODUCTS
          • Allegro Package Designer Plus
          • Allegro PCB Designer
          • RESOURCES
          • What's New in Allegro
          • What's New in Sigrity
          • Advanced PCB Design & Analysis Resources Hub
          • Flows
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      • AI IP Portfolio
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  • 2018
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  • 12 Jul 2018

Cadence Automotive Solution for Safety Verification Used by ROHM to Achieve ISO 26262 ASIL D Certification

SAN JOSE, Calif., 12 Jul 2018

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that its Cadence® Automotive Solution has been used by ROHM CO., Ltd. for safety verification, a critical component of its ISO 26262-compliant tool chain for automotive LSIs. The ROHM flow, which has achieved ASIL D certification from TÜV Rheinland, a global leader in independent inspection services, utilizes Cadence fault injection simulation technology, which can reduce the effort required to complete the safety verification process by up to 50 percent for automotive applications.

ROHM will be presenting additional details on this use-case at CDNLive Japan 2018 being held at the Yokohama Bay Tokyu Hotel on July 20, 2018. For more information on CDNLive Japan 2018, please visit www.cadence.com/go/CDNLiveJapan. 

The flow from ROHM utilized Cadence Incisive® functional safety technology to achieve ASIL D certification, the highest level for automotive functional safety. Software validation of the Safety Verification component of the Cadence Automotive Solution, including fault injections, was critical in meeting TÜV Rheinland’s certification requirements. Cadence fault simulation technology effectively addresses many complexities associated with automotive design verification. The simulator allows for successful fault effect analysis for various fault modes, including single event transient (SET), single event upset (SEU), stuck-at 0/stuck-at 1, and dual-point faults, while outperforming existing design-for-test (DFT)-based flows for safety-related fault effect analysis.

“With this new certification from TÜV Rheinland, our customers can be assured that our new LSIs for the automotive market are designed with the highest specifications for automotive safety,” stated Nobuhiro Kanai, LSI Headquarters Head of Product Development, ROHM Co., Ltd. “Our flow, utilizing the Cadence Automotive Solution’s safety verification component, has been designed to be compliant with the new, second edition of ISO 26262, which will be released in 2018. Fault injection is a mandatory feature for achieving ASIL D certification and compliance with the second edition of the ISO 26262 standard. Additionally, the Cadence solution enabled us to do fault injection simulation using the same testbench, design and debugging environment, which significantly speeds our verification process.”

The Cadence Automotive Solution’s Safety Verification flow automates what can otherwise be a manual, time-consuming process for achieving ISO 26262 functional safety compliance. The solution is part of the Cadence Verification Suite’s application-optimized solution for automotive devices. It also supports the company’s System Design Enablement strategy, which enables system and semiconductor companies to create complete, differentiated end products more efficiently.

For more information on Cadence Automotive Solution, please visit http://www.cadence.com/go/automotivesolution.

About Cadence

Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at www.cadence.com.

For more information, please contact:

Cadence Newsroom
408-944-7039
newsroom@cadence.com

© 2018 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

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