Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced Cadence® Allegro® PCB DesignTrue DFM technology, the industry’s first solution to perform real-time, in-design design-for-manufacturing (DFM) checks integrated with electrical, physical and spacing design rule checks (DRCs). The innovative new technology, integrated into the Allegro PCB Editor, enables PCB designers to identify and correct errors immediately, long before manufacturing signoff. By finding errors earlier, design teams reduce rework, shorten design cycles and accelerate the new product development and introduction process, potentially saving at least one day per iteration and days to weeks overall. For more information, visit www.cadence.com/go/designtruedfm.
Unlike manufacturing signoff tools that are run in batch mode when performing DFM checks, DesignTrue DFM technology provides continuous in-design feedback while designing, eliminating the frustrating and time-consuming design-verify-fix iterations between PCB designers and DFM checking teams. By the time PCB designers reach final DFM signoff, they already know their design meets manufacturing rules, resulting in a smoother signoff and handoff to the manufacturing partner and a shorter, more predictable design cycle.
DesignTrue DFM technology is consistent with the proven Allegro constraint-driven design flow and online checking solution currently used for electrical, physical and spacing rules. DesignTrue DFM technology provides a wide set of checks to ensure design manufacturability. Spacing between copper features such as traces, pins, vias relative to the board outline and other copper features can be verified in real time, independent of electrical and net-based rules.
The new technology makes it easy to configure, apply contextually and reuse manufacturing rules. DesignTrue DFM technology supports the import and export of DFM rules and addresses more than 2,000 advanced checks. In addition, it employs a new and more user-friendly DRC browser capable of addressing one class of errors at a time. Constraints are highly configurable with the ability to enable and disable groups and whole categories of rules, or individual rules. Rules can be applied in etch mode, non-etch mode, and in stack-up mode, giving designers the ability to isolate layers, geometries and cutouts. The new browser also features an integrated DRC description with graphics, characterizes DRCs by type and provides a DRC count chart. Users can quickly sort, browse and review, as well as waive and unwaive DRCs.
“Increasing PCB complexity is extending our design cycles and making them more challenging to predict,” said Scott Miller, COO of Freedom CAD Services. “By using the Cadence Allegro PCB DesignTrue DFM technology, our PCB designers can be assured that they are designing the board correctly the first time, taking into account electrical, physical and manufacturing constraints. This eliminates unnecessary iterations with manufacturing signoff processes and can save us days to weeks of time.”
“Accelerating new product development and introduction is a key priority for our customers,” said Tom Beckley, senior vice president and general manager, Custom IC & PCB Group at Cadence. “For more than 15 years, our customers have relied on the Allegro constraint-driven flow and online checking solution for the electrical and physical domains. As part of our System Design Enablement strategy, we’re now applying this same approach to DFM checks. Extending our solution to the manufacturing domain enables electronics OEMs to bring their products to market more quickly and with greater confidence.”
