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  • Products
    • DESIGN EXCELLENCE
      • Digital Design and Signoff
        • PRODUCT CATEGORIES
          • Logic Equivalence Checking
          • SoC Implementation and Floorplanning
          • Functional ECO
          • Low-Power Validation
          • Synthesis
          • Power Analysis
          • Constraints and CDC Signoff
          • Silicon Signoff and Verification
          • Library Characterization
          • Test
        • FEATURED PRODUCTS
          • Integrity 3D-IC Platform
          • Cadence Cerebrus Intelligent Chip Explorer
          • Genus Synthesis Solution
          • Innovus Implementation System
          • Tempus Timing Signoff Solution
          • Voltus IC Power Integrity Solution
          • Pegasus Verification System
          • RESOURCES
          • Flows
      • Custom IC / Analog / RF Design
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          • Circuit Design
          • Circuit Simulation
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          • Layout Verification
          • Library Characterization
          • RF / Microwave Solutions
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          • Virtuoso Layout Suite
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          • Virtuoso Advanced Node
          • Voltus-Fi Custom Power Integrity Solution
          • RESOURCES
          • Flows
      • Verification
        • PRODUCT CATEGORIES
          • Debug Analysis
          • Virtual Prototyping
          • Emulation and Prototyping
          • Static and Formal Verification
          • Planning and Management
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          • Verification IP
          • System-Level Verification IP
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          • vManager Verification Management
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          • 112G/56G SerDes
          • Chiplet and D2D
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        • RESOURCES
          • Discover PCIe
      • IC Package Design and Analysis
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  • 11 Oct 2017

Hiroshima University Research Team Accelerates the Development of a Computer-Aided Medical Diagnosis System with Cadence Tensilica Vision P6 DSP Core and Protium S1 FPGA-Based Prototyping Platform

SAN JOSE, Calif., 11 Oct 2017

Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced that Hiroshima University is using Cadence® technology in its development of a computer-aided diagnosis system for colorectal endoscopic images. Led by Associate Prof. Koide of the Research Institute for Nanodevice and Bio Systems (RNBS), the team developed the computer-aided diagnosis system using the Cadence Tensilica® Vision P6 digital signal processor (DSP) core for convolutional neural network (CNN) processing and support vector machine (SVM) classification, and brought up the software and verified the system using the Cadence Protium™ S1 FPGA-Based Prototyping Platform. With the help of Cadence Tensilica technology, the Hiroshima University project has demonstrated a 35X reduction in image processing time, enabling real-time processing of diagnostic images for the healthcare market.  

Due to the increase in the number of colorectal cancer patients in recent years, a diagnosis system capable of presenting additional image analysis information to physicians has been desired to aid in early detection. Such a system needs to evaluate pathology type in high definition (1920 x 1080 pixel) using the features extracted with narrow band imaging (NBI) magnification, while offering high estimation accuracy and enabling real-time response for clinicians.

To address this need, Hiroshima University developed an approach using the configurable Vision P6 DSP to perform CNN processing for feature extraction from the endoscopic images and SVM for the pathology type identification, improving computational efficiency for this high-complexity processing. Furthermore, the software development and verification was finalized with the Protium S1 platform, ensuring early and proper system functionality. For more information on the Tensilica Vision P6 DSP, please visit https://www.cadence.com/go/visionp6dsp. For more information on the Protium S1 FPGA-Based Prototyping Platform, please visit http://www.cadence.com/go/protiumhiroshima.

The Vision P6 DSP efficiently executes both image processing and CNN processing, which are indispensable in deep learning. It supports image processing and CNN processing on a flexible high-performance DSP core. Through this deployment, the Hiroshima University has demonstrated that the system meets the requirement for real-time processing, low latency and estimation accuracy.

The Protium S1 platform, part of the Cadence Verification Suite, is designed for early, pre-silicon software development and significantly improves productivity by reducing prototype bring-up time from months to weeks compared to competitive solutions. The platform let the research team verify the system’s performance early in the process, allowing for the early identification of bugs, speeding up development time. For more information on the Verification Suite, please visit http://www.cadence.com/go/verification_suite.

“To meet our end goal of producing a diagnostic system that can be functional in a clinical application, it is necessary for the system to process images in real time and with low latency during an endoscopic examination,” said Associate Prof. Koide of RNBS at Hiroshima University. “Through our use of the Cadence Tensilica Vision P6 DSP core and the Protium S1 FPGA-Based Prototyping Platform, we were able to reduce the image processing time and optimize our co-design of software and hardware, creating a more streamlined development process. The Cadence technology was instrumental in allowing us to develop a tool that met medical needs for performance and precision.” 

About Cadence

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